Elevationally-Extending Conductor Insulation for IC Parasitic Capacitance
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Solution Overview
Problem
Parasitic capacitance between conductive vias in integrated circuitry adversely affects circuit performance, leading to inefficiencies in memory cell operations.
Innovation Solution
The formation of an elevationally-extending conductor laterally between structures, utilizing insulative materials with specific compositions and thicknesses, and the sequential deposition of insulator layers to minimize parasitic capacitance, involves forming a laterally-inner-insulator, laterally-intervening-insulator, and laterally-outer-insulator materials, with the latter having varying carbon content to optimize dielectric constants and reduce capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conductive vias are placed laterally adjacent to each other to interconnect memory cells, then circuit functionality is achieved, but parasitic capacitance increases adversely affecting performance
Solution Approach 1:
An insulator material is introduced as an intermediary substance between laterally-adjacent conductive vias. This insulator layer physically separates the vias and electrically isolates them, thereby eliminating the parasitic capacitance that would otherwise exist between adjacent conductive structures while maintaining their lateral arrangement for circuit functionality.
Solution Approach 2:
The space between conductive vias is segmented by introducing distinct insulator material layers. Instead of having continuous or adjacent conductive structures, the vias are divided and separated by insulating regions, which breaks the capacitive coupling between them while preserving the lateral interconnection topology.
2Object-generated harmful factors
If insulator material is added between conductive vias to reduce parasitic capacitance, then capacitance is reduced, but device complexity increases
Solution Approach 1:
The insulator material serves multiple functions simultaneously: it provides electrical isolation between conductive vias to reduce parasitic capacitance, acts as a structural filler in the lateral spacing between vias, and maintains the mechanical integrity of the memory cell architecture. This multi-functionality reduces the need for additional specialized components.
Solution Approach 2:
The insulator material formation is merged with existing fabrication processes. The insulator is deposited as part of the standard memory cell construction sequence, combining the isolation function with the structural formation steps, thereby avoiding separate complex processing stages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic capacitance, enhancing circuit performance by improving the isolation between conductive vias and thereby maintaining data storage accuracy and efficiency in memory cells.
Implementation Method 1
parasitic capacitance exists laterally between the one conductive via and the other conductive via
Implementation Method 2
with the latter having varying carbon content to optimize dielectric constants and reduce capacitance
Data Source
AI summary
A method of forming an elevationally-extending conductor laterally between a pair of structures comprises forming a pair of structures individually comprising an elevationally-extending-conductive via and a conductive line electrically coupled to and crossing above the conductive via. The conductive line and the conductive via respectively have opposing sides in a vertical cross-section. Elevationally-extending-insulative material is formed along the opposing sides of the conductive via and the conductive line in the vertical cross-section. The forming of the insulative material comprises forming a laterally-inner-insulator material comprising silicon, oxygen, and carbon laterally-outward of the opposing sides of the conductive via and the conductive line in the vertical cross-section. A laterally-intervening-insulator material comprising silicon and oxygen is formed laterally-outward of opposing sides of the laterally-inner-insulator material in the vertical cross-section. The laterally-intervening-insulator material comprises less carbon, if any, than the laterally-inner-insulator material. A laterally-outer-insulator material comprising silicon, oxygen, and carbon is formed laterally-outward of opposing sides of the laterally-intervening-insulator material in the vertical cross-section. The laterally-outer-insulator material comprises more carbon than the laterally-inner-insulator material. Elevationally-extending-conductor material is formed laterally between and along the insulative material in the vertical cross-section. Additional method aspects, including structure independent of method of fabrication, are disclosed.