Integrated Circuit Connection Line Layout for Lower Wiring Resistance
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Solution Overview
Problem
The performance of integrated circuits is affected by the resistance of connection lines, which do not always meet design rules such as minimum width, length, area, and enclosure rules, leading to inefficiencies in signal exchange between cells.
Innovation Solution
The design of integrated circuits includes connection lines with varying lengths that satisfy design rules, minimizing resistance by optimizing via distances and enclosure distances, and a method for placing cells to connect them with the shortest possible lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If connection lines are made shorter to reduce resistance, then signal transmission performance is improved, but design rules such as minimum length and enclosure rules may be violated
Solution Approach 1:
The patent applies local quality by making the connection line width variable along its length. Specifically, the connection line has a first width in a first region and a second width different from the first width in a second region. This allows different segments of the connection line to have different properties, enabling the line to satisfy minimum length and enclosure design rules in certain regions while maintaining shorter overall length to reduce resistance and improve signal transmission performance.
2Manufacturing precision
If connection lines are made to satisfy minimum length design rules, then manufacturing compliance is improved, but wiring resistance increases and signal transmission efficiency decreases
Solution Approach 1:
The connection line implements local quality by having different widths in different regions. The first width in the first region and the second width in the second region allow the connection line to satisfy minimum length design rules for manufacturability while keeping portions of the line shorter to minimize overall resistance and maintain signal transmission efficiency.
3Ease of manufacture
If uniform width connection lines are used, then manufacturing simplicity is maintained, but the ability to optimize resistance and satisfy design rules simultaneously is limited
Solution Approach 1:
The patent employs local quality by varying the connection line width along its length, with a first width in a first region and a second width in a second region. This approach balances manufacturing considerations with performance optimization, allowing different segments to serve different functions while maintaining overall manufacturability.
Solution Approach 2:
The connection line implements parameter changes by modifying the width parameter along its length. The width transitions from a first width to a second width, allowing the physical dimensions to be optimized for both manufacturing compliance and electrical performance, thereby reducing resistance while satisfying design rules.
Data Source
AI summary
An integrated circuit includes: a first cell arranged in a first row extending in a first direction and performing a first function, a second cell arranged in the first row and performing a second function, a third cell arranged in a second row extending in the first direction and performing the first function, a fourth cell arranged in the second row and performing the second function, a first connection line connecting a first via in the first cell to a second via in the second cell, and a second connection line connecting a third via in the third cell to a fourth via in the fourth cell, wherein a length of the first connection line is different from a length of the second connection line.