IC Contact Layout With Lateral Offset for Short Isolation

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Solution Overview

Problem

Conventional fabrication techniques for integrated circuits (ICs) face challenges in achieving adequate isolation between source/drain contacts and gate contacts while maintaining performance, leading to potential shorts and increased resistance due to thick dielectric caps and high aspect ratios.

Innovation Solution

The development of novel IC structures and manufacturing techniques that allow for thinner dielectric caps and smaller aspect ratios, enhancing the process window for device contacts and improving performance and manufacturability by using specific contact structures and materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thick dielectric caps are used to ensure isolation between contacts, then reliability improves, but manufacturing precision deteriorates due to increased aspect ratios and fabrication difficulty

Engineering Contradiction:
Improveisolation between contactsVSAvoidaspect ratio control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces a lateral offset between the gate contact and source/drain contacts, moving the isolation problem from a vertical dimension (thick dielectric caps) to a lateral dimension (spaced arrangement). This dimensional shift allows thinner dielectric caps while maintaining adequate isolation through horizontal separation, thereby reducing aspect ratios and improving manufacturability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If thick dielectric caps are used to prevent shorts, then reliability improves, but device complexity increases due to larger trench dimensions

Engineering Contradiction:
Improveshort preventionVSAvoidtrench aspect ratio
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent resolves the short prevention requirement by introducing lateral spacing between contacts rather than relying solely on vertical dielectric thickness. This dimensional transformation reduces trench depth requirements and aspect ratios, simplifying the device structure while maintaining reliability through offset contact positioning.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional fabrication techniques are used, then manufacturing ease is maintained, but productivity decreases due to limited process window

Engineering Contradiction:
Improvefabrication processVSAvoidprocess window
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent modifies the contact arrangement parameters by introducing lateral offsets between gate and source/drain contacts. This parameter change expands the fabrication process window, allowing greater variability in dielectric cap thickness and trench dimensions while maintaining adequate isolation, thereby improving both ease of manufacture and productivity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11973121B2Device contacts in integrated circuit structures
Publication Date: 2024.04.30 INTEL CORP
  • US11973121B2 patent drawing
  • US11973121B2 patent drawing
  • US11973121B2 patent drawing

AI summary

Discussed herein are device contacts in integrated circuit (IC) structures. In some embodiments, an IC structure may include: a first source/drain (S/D) contact; a gate contact, wherein the gate contact is in contact with a gate and with the first S/D contact; and a second S/D contact, wherein a height of the second S/D contact is less than a height of the first S/D contact.