Continuous Testing of Repetitive IC Blocks via Dynamic Remapping
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Solution Overview
Problem
As semiconductor technology advances to 65 nm lithographic nodes and beyond, ensuring safe and reliable operation of deep submicron integrated circuits becomes increasingly challenging due to sensitivity to leakage current and soft errors, particularly in applications requiring stringent safety standards like IEC 61508, where achieving adequate yield and reliability is difficult.
Innovation Solution
A system and method for continuous testing of repetitive functional blocks on integrated circuits, utilizing a test system integrated into the IC that includes spare functional blocks and logic for redirecting operations, allowing for seamless testing during normal operation without disrupting functionality, using various test methods such as substitution, shadow substitution, shift, and delayed shift tests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous testing of repetitive functional blocks is implemented, then reliability is improved, but device complexity increases
Solution Approach 1:
A single test functional block is designed to universally test multiple repetitive functional blocks through logical remapping. The test block can be dynamically assigned to test different functional blocks (FB1, FB2, FB3, etc.) by controlling the remapping logic, eliminating the need for dedicated test blocks for each functional block and reducing overall device complexity while maintaining continuous testing capability.
Solution Approach 2:
The patent implements dynamic remapping logic that can reconfigure the connection between test functional blocks and operational functional blocks in real-time. This dynamic remapping allows the system to switch between testing different functional blocks without hardware changes, enabling continuous testing while managing device complexity through software-controlled configuration rather than fixed hardware architecture.
2Reliability
If spare functional blocks are used for testing, then reliability is improved, but area of the object increases
Solution Approach 1:
Operational functional blocks serve dual purposes: they perform their primary operational functions during normal operation and serve as test functional blocks when needed. The remapping logic enables any operational functional block to be temporarily reassigned as a test block, eliminating the need for dedicated spare functional blocks and reducing the overall chip area while maintaining the capability for continuous testing and fault replacement.
Solution Approach 2:
The system changes the functional state of existing functional blocks dynamically. By controlling the remapping logic, the same physical block can switch between operational mode and test mode, allowing the system to adapt its configuration based on testing needs without requiring additional hardware resources or increasing the object area.
3Productivity
If logical remapping is continuously revised to enable testing, then productivity is improved, but device complexity increases
Solution Approach 1:
The control logic is segmented into modular components: operational logic for normal functioning, test logic for testing operations, and remapping logic for configuration switching. This segmentation allows each module to be independently optimized and managed, reducing the complexity burden of continuous remapping while maintaining high productivity through efficient task distribution across specialized logic units.
Data Source
AI summary
A method of continuous testing of repetitive functional blocks provided on an integrated circuit (IC) which includes selecting one of the repetitive functional blocks at a time for testing, substituting a test repetitive functional block for a selected repetitive functional block, and testing the selected repetitive functional block during normal functional mode of the IC. An IC which includes repetitive functional blocks for performing corresponding functional block operations during normal functional mode of the IC, and a test system which performs continuous testing of each repetitive functional block while the functional block operations are performed during normal functional mode of the IC. One block may be tested during normal operation for each IC reset event without transferring or copying state information. Multiple blocks may be tested one at a time during normal operation by transferring state information between a selected block and a test block.