IC CRC Arbitration for Multi-Source Configuration Memory Updates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In systems with integrated circuits (ICs) that require multiple sources to update data, detecting bit errors in memory becomes complex due to the need for each source to track all data updates, which can lead to safety violations if not managed promptly.
Innovation Solution
An integrated circuit (IC) with a cyclic redundancy check (CRC) engine that performs CRC operations to distinguish between purposeful updates and bit errors, tracks write requests from internal and external sources, and ensures CRC checksum validity within a target update interval, ensuring data integrity and preventing errors from propagating.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple sources attempt to update data in memory, then update capability and system functionality are improved, but complexity of tracking all data updates and ensuring data integrity increases
Solution Approach 1:
The patent introduces a CRC engine as an intermediary component that mediates between multiple update sources and the memory storage. The CRC engine receives data from various sources, calculates cyclic redundancy check values, and stores these checksums in memory alongside the actual data. This intermediary mechanism allows multiple sources to update data without requiring each source to track all other updates, as the CRC engine centrally manages integrity verification.
Solution Approach 2:
The patent implements a feedback mechanism where the CRC engine continuously monitors data integrity by comparing stored CRC checksums with current data values. When data is updated from any source, the system recalculates the CRC and compares it with the stored value, providing immediate feedback on data integrity. This feedback loop enables the system to detect and respond to bit errors while allowing multiple update sources to operate concurrently.
2Reliability
If CRC checksum is recalculated frequently to detect bit errors quickly, then detection speed and safety are improved, but computational overhead and processing time increase
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing CRC checksums for all data in memory before updates occur. When data is updated, the system only needs to recalculate the CRC for the specific modified portion and compare it with the stored checksum, rather than recalculating the entire CRC for all data. This preliminary preparation significantly reduces the processing time required for error detection while maintaining high reliability.
3Device complexity
If single source updates data in memory, then data integrity management is simplified, but system functionality and adaptability are limited
Solution Approach 1:
The patent implements universality by designing the CRC engine to handle data updates from multiple sources through a unified mechanism. The same CRC calculation and verification process applies regardless of whether data is updated from internal sources, external peripherals, or other memory locations. This universal approach maintains simplified integrity management while enabling flexible multi-source updates, as the CRC engine universally manages integrity for all data modifications.
Data Source
AI summary
An integrated circuit (IC) includes: a storage having a storage interface and addressable bytes, the storage interface coupled to first and second sets of peripheral terminals; control circuitry having control circuitry inputs and control circuitry outputs, the control circuitry inputs coupled to the storage interface and configured to receive configuration bits provided by the storage responsive to a control circuitry update trigger, and the control circuitry outputs coupled to first and second sets of peripheral outputs; and a cyclic-redundancy check (CRC) engine coupled to the storage interface, the CRC engine configured to distinguish between purposeful updates to the data in the storage and bit errors in the data in the storage.


