Integrated Circuit Current Masking via Auxiliary Noise Generation
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Solution Overview
Problem
Existing integrated circuits face challenges in masking current consumption, particularly due to parasitic capacitances and short-circuit currents generated during signal transitions, which can reveal operational information and data handled, necessitating effective methods to obscure these currents without excessive resource usage.
Innovation Solution
Incorporating an auxiliary circuit that randomly generates additional currents between supply and reference terminals during signal state changes, mimicking noise, thereby masking the logic circuit's current consumption and making it difficult to deduce operations through current analysis, without requiring global current masking across the entire integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If the dual rail technique is used to mask current consumption, then current masking is achieved, but the surface area increases and logic gates are doubled
Solution Approach 1:
The invention divides the masking function into two segments: a global masking current source that provides baseline masking, and local masking circuits that are selectively activated only for specific logic gates requiring protection. This segmentation allows targeted masking without duplicating all logic gates, thereby reducing surface area while maintaining security for critical components.
Solution Approach 2:
Instead of applying uniform masking across the entire circuit, the invention applies masking selectively to specific logic gates based on their security requirements. The local masking circuits are activated only when and where needed, optimizing resource usage and reducing overall surface area while maintaining effective masking for sensitive operations.
2Loss of information
If the dual rail technique is used to mask current consumption, then current masking is achieved, but the number of logic gates is doubled
Solution Approach 1:
The masking functionality is segmented into a global component shared by all logic gates and local components activated only for protected gates. This eliminates the need to double every logic gate, as the global masking current serves all gates simultaneously, while local adders are selectively instantiated only for gates requiring enhanced protection.
Solution Approach 2:
The global masking current source serves multiple logic gates simultaneously, providing a universal masking function that benefits the entire circuit without requiring separate masking infrastructure for each gate. This multi-functionality reduces the total number of logic gates needed compared to individual masking circuits for each gate.
3Loss of information
If global current masking is applied to the entire integrated circuit, then all current consumption is masked, but unnecessary resource utilization increases
Solution Approach 1:
The invention applies masking quality selectively to different regions of the circuit based on their security needs. Critical logic gates receive both global and local masking, while non-critical gates receive only the baseline global masking or no masking at all. This localized approach masks only the necessary current consumption, reducing energy waste from masking unprotected components.
Solution Approach 2:
The masking system dynamically activates local masking circuits only when specific logic gates are operational or when security threats are detected. Instead of continuously masking all circuits, the system adapts its masking intensity to actual operational needs, thereby reducing unnecessary energy consumption and resource utilization while maintaining security when required.
Data Source
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AI summary
Electronic device (IC) comprising at least one logic circuit (LC) which has a first terminal (B1) intended to receive a supply voltage (Vdd), a second terminal (B2) intended to receive a reference voltage (GND), and at least one output terminal (S), the output terminal (S) being configured to deliver a signal which may be in a high state or a low state, at least one auxiliary circuit (AUX) coupled between the first terminal (B1) and the second terminal (B2) and configured to randomly generate or not generate an additional current between the first terminal (B1) and the second terminal (B2) at each change of state of the signal on the output terminal (S).