Integrated Circuit Current Mirroring with Cascode Correction
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Solution Overview
Problem
Integrated circuits face challenges in maintaining stable operation due to current mismatches between source and reference currents, particularly under variations in fabrication processes and temperature, which existing technologies have not adequately addressed.
Innovation Solution
The integrated circuit design includes a source current generation block, mirroring blocks, and correction blocks that generate and correct current mismatches by using biasing and cascode mirroring units to ensure accurate mirroring and reference current generation, thereby stabilizing the operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional current mirroring is used, then circuit simplicity is maintained, but current mismatch between source and reference currents occurs due to fabrication process variations and temperature changes
Solution Approach 1:
The current mirroring system is divided into multiple stages: a first current mirroring unit that mirrors the source current to generate an intermediate current, and a second current mirroring unit that mirrors the intermediate current to generate the reference current. This segmentation allows independent optimization and correction at each stage, improving overall current matching accuracy while managing circuit complexity through modular design.
Solution Approach 2:
An intermediate current is introduced as a mediator between the source current and the reference current. This intermediate current serves as a reference for the second current mirroring unit, enabling more accurate current matching by breaking the direct mirroring relationship into two controlled steps, each with its own biasing and correction mechanisms.
2Reliability
If current correction blocks are added, then current mismatch is corrected, but additional circuit area is required
Solution Approach 1:
The biasing units and current correction functions are merged into the existing current mirroring structure. The first biasing unit generates a first bias voltage for the first current mirroring unit, while the second biasing unit generates a second bias voltage for the second current mirroring unit. These biasing circuits are integrated within the mirroring blocks themselves, correcting current mismatches without requiring separate correction blocks and minimizing additional area.
Solution Approach 2:
The biasing units serve multiple functions: they establish the operating point for the respective current mirroring units, provide temperature compensation, and enable current mismatch correction. By making the biasing circuits multi-functional, the patent avoids adding dedicated correction circuits, thereby correcting current errors while minimizing area overhead.
3Measurement precision
If biasing units are used to generate bias voltages, then current mirroring accuracy is improved, but additional components increase device complexity
Solution Approach 1:
Each current mirroring unit has its own dedicated biasing unit that generates a specific bias voltage tailored to that unit's requirements. The first biasing unit generates a first bias voltage for the first current mirroring unit, and the second biasing unit generates a second bias voltage for the second current mirroring unit. This localized biasing approach optimizes current mirroring precision at each stage while keeping the biasing circuitry distributed and manageable rather than centralized and complex.
Data Source
AI summary
An integrated circuit includes: a source current generation block suitable for generating a source current; a first mirroring block suitable for generating first and second mirroring currents corresponding to the source current; a second mirroring block suitable for generating a third mirroring current and a reference current corresponding to the first mirroring current; a first correction block suitable for correcting a current mismatch between the source current, the first mirroring current and the second mirroring current based on the third mirroring current; and a second correction block suitable for correcting a current mismatch between the first mirroring current, the third mirroring current and the reference current based on the second mirroring current.