Integrated Circuit Data Transfer Sections Stagger Inversion

The patent applies periodic action by controlling different second sections to invert data at different time periods or phases. Each second section operates with a staggered inversion timing, so that data toggling occurs periodically but not simultaneously across all sections. This distributes the current consumption over time, reducing peak current while maintaining overall data transfer capability.

The patent segments the data transfer system into multiple first sections and multiple second sections. Each section handles a portion of the data independently, with the second sections performing serial-to-parallel conversion on different data subsets. This segmentation allows independent control of inversion timing in each section, enabling staggered operation that reduces simultaneous toggling and peak current consumption.

The patent applies local quality by making the inversion operation selective rather than universal. Different second sections are configured with different inversion characteristics - some sections invert data while others maintain original patterns. This local differentiation diversifies data patterns across the system to reduce peak current, while ensuring that not all data undergo excessive inversions, thereby maintaining transfer reliability.

The patent implements partial action by applying data inversion only to certain sections or certain data bits within sections, rather than inverting all data in all sections. This selective inversion is sufficient to diversify data patterns and reduce peak current consumption, while avoiding the reliability issues that would arise from excessive or universal inversion operations.