IC Debug Mode Switching Using Internal Clock Signal Detection

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Solution Overview

Problem

Existing integrated circuit devices require complex circuit configurations and timer management to switch operation modes, leading to increased size and complexity, as they need to synchronize with both internal and external clocks for mode switching and signal control.

Innovation Solution

An integrated circuit device with an operation mode determination circuit that uses an internal clock to independently set and switch between normal and debug modes based on the logical state of a communication signal, eliminating the need for timer circuits and synchronization with the communication clock.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the integrated circuit device uses external control signals synchronized with communication clock for mode switching, then the mode switching can be controlled from external device, but the circuit configuration becomes complex and size increases due to required timer circuits in both control device and integrated circuit device

Engineering Contradiction:
Improveexternal control of mode switchingVSAvoidcircuit configuration
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts the timer management function from the integrated circuit device and relocates it to the external control device. The integrated circuit device only needs to detect the logical state of communication signals, while the external control device generates control signals synchronized with its own communication clock. This separation eliminates the need for timer circuits in the integrated circuit device, reducing its complexity and size while maintaining external controllability of mode switching.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If the integrated circuit device uses timer circuits for managing control signal timing, then the mode switching can be precisely controlled, but the device size increases due to additional timer circuits required in both control device and integrated circuit device

Engineering Contradiction:
Improvetiming control precisionVSAvoiddevice size
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The timer circuit functionality is extracted from the integrated circuit device and consolidated in the external control device. The external control device uses its communication clock to generate precisely timed control signals, and the integrated circuit device simply detects the logical state of these signals. This eliminates the need for duplicate timer circuits in both devices, reducing overall device size while maintaining precise timing control through the external device's clock synchronization.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If the integrated circuit device requires synchronization with both internal clock and external communication clock for mode switching, then the mode switching can be coordinated with communication, but the circuit configuration becomes larger and more complex

Engineering Contradiction:
Improvemode switching coordinationVSAvoidcircuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the external clock synchronization function from the integrated circuit device and places it in the external control device. The external control device generates control signals synchronized with its communication clock, and the integrated circuit device detects these signals using its internal clock. This separation eliminates the need for the integrated circuit device to synchronize with external clocks, reducing its circuit complexity while maintaining reliable coordination through the external device's synchronization capability.

Inventive Principle:
Principle #2Taking out (Extraction)

4Loss of time

If the integrated circuit device uses interrupt signals and timer management for mode switching, then the mode switching can be precisely timed, but the size and complexity of the circuit configuration increases

Engineering Contradiction:
Improvemode switching timing efficiencyVSAvoidcircuit configuration
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent extracts the timer management and interrupt signal generation functions from the integrated circuit device and consolidates them in the external control device. The external control device generates interrupt signals and control signals with precise timing based on its communication clock, and the integrated circuit device responds by detecting the logical state of these signals. This eliminates the need for timer circuits in the integrated circuit device, reducing its complexity while maintaining precise timing efficiency through the external device's clock-synchronized control.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10797692B2Integrated circuit device
Publication Date: 2020.10.06 FUJI ELECTRIC CO LTD
  • US10797692B2 patent drawing
  • US10797692B2 patent drawing
  • US10797692B2 patent drawing

AI summary

An integrated circuit device includes a circuit device main body which is configured to execute a predetermined processing function, a communication control circuit which is configured to perform data communication with an external control device and an operation mode determination unit which is configured to selectively determine a normal mode for executing the processing function or a debug mode for setting an execution condition of the processing function as an operation mode of the circuit device main body. The operation mode determination circuit is configured to operate in accordance with an internal clock and to generate an operation mode output value for determining the operation mode of the circuit device main body according to a logical state of a particular one communication signal which is data-communicated with the external control device after a reset operation performed by a reset circuit is released.