Integrated Circuit Delay Path Testing Confidence
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Solution Overview
Problem
Current methods for testing integrated circuits are inefficient in identifying critical delay paths due to variations in production, leading to increased testing time and potential errors.
Innovation Solution
A method that predicts and ranks critical delay paths based on actual measurements, generating a confidence measurement to determine the likelihood of testing the most critical paths, and modifies prediction techniques for improved accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If more delay paths are tested to ensure actual critical paths are covered, then testing reliability is improved, but testing time increases
Solution Approach 1:
The patent performs preliminary testing on a subset of delay paths before full production testing. By initially testing a smaller set of paths and using the results to update predictions, the system identifies critical paths more efficiently without requiring exhaustive testing of all possible delay paths, thus reducing overall testing time while maintaining reliability
Solution Approach 2:
The patent implements a feedback mechanism where actual delay measurements from preliminary testing are used to update and refine the predicted critical delay paths. This feedback loop allows the system to adapt predictions based on real data, improving the accuracy of identifying critical paths and enabling more reliable testing with fewer paths examined
2Productivity
If predicted critical delay paths are used for testing, then testing efficiency is improved, but accuracy of identifying actual critical paths deteriorates
Solution Approach 1:
The system performs preliminary testing on predicted critical delay paths before production testing. This preliminary action validates the predictions and provides actual measurement data that can be used to refine the prediction model, ensuring that the most accurate paths are identified for full production testing
Solution Approach 2:
Actual delay measurements from preliminary testing are fed back into the prediction model to update and improve future predictions. This feedback mechanism continuously refines the accuracy of predicted critical paths by incorporating real-world data, thereby improving measurement precision while maintaining testing efficiency
Data Source
AI summary
A method of testing critical delay paths of an integrated circuit design is disclosed. The method includes predicting and ranking a set of critical delay paths based on a set of predicted delay characteristics. Integrated circuits based on the integrated circuit design are tested to determine a set of actual delay measurements for the critical delay paths. The critical delay paths are ranked based on the actual delay measurements, and the results are correlated to the predicted ranking of critical delay paths to produce a confidence measurement that measures the likelihood that the actual critical delay paths of the design have been tested for a given production batch of devices.