Integrated Circuit Design Configuration Graph Optimization
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Solution Overview
Problem
Traditional methods for improving integrated circuit manufacturing yield are laborious, time-consuming, and inefficient, as they react to problems after they occur, focusing on detected failures rather than preventing them, and are hindered by complex multi-factorial interactions, leading to incremental and non-optimal improvements.
Innovation Solution
A method using configuration graphs to systematically characterize and optimize integrated circuit designs and manufacturing processes by defining a design and manufacturing configuration space, annotating nodes with intrinsic and extrinsic data, and searching for optimal configurations to replace problematic ones, thereby addressing yield improvement as a computation problem.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional manual yield improvement processes are used, then yield may increase incrementally over several years, but the process is laborious, time-consuming, and the rate of improvement slows as design and manufacturing complexity increases
Solution Approach 1:
The patent replaces the manual, mechanical process of yield improvement with an automated computational system. The system uses a database of design configurations, automated pattern recognition algorithms, and machine learning models to identify and eliminate yield-limiting patterns, substituting human engineers' manual analysis and trial-and-error processes with automated computational methods that operate faster and scale better with complexity
Solution Approach 2:
The system performs preliminary analysis of design configurations before manufacturing to identify potential yield-limiting patterns. By pre-characterizing design patterns and their associated yield impacts in a database, the system can predict and prevent yield problems before they occur in production, rather than reacting to failures after they happen
2Reliability
If restricted design rules are used to eliminate yield-limiting structures, then some yield problems are addressed, but additional defects may be discovered after problems or failures are caused and the process must be repeated
Solution Approach 1:
The patent creates a universal system that handles multiple types of yield problems across different design and manufacturing complexities. The database and pattern recognition algorithms are designed to be applicable to various circuit types, manufacturing processes, and defect modes, providing a multi-functional platform that addresses diverse yield issues through a unified approach rather than requiring separate manual analysis for each problem type
Solution Approach 2:
The system implements feedback loops where manufacturing yield data and defect information are continuously fed back into the database to refine pattern recognition models. This feedback mechanism allows the system to learn from actual manufacturing outcomes and improve its ability to identify yield-limiting patterns, creating a self-improving system that adapts to increasing complexity
3Reliability
If traditional reactive problem-solving is used where engineers observe problems after they occur, then individual problems can be addressed, but the overall yield improvement is incremental and non-optimal due to complex multi-factorial interactions
Solution Approach 1:
The system performs preliminary analysis of design configurations before manufacturing to identify potential yield-limiting patterns. By pre-characterizing design patterns and their associated yield impacts in a database, the system can predict and prevent yield problems before they occur in production, rather than reacting to failures after they happen
Solution Approach 2:
The patent replaces the manual, mechanical process of yield improvement with an automated computational system. The system uses a database of design configurations, automated pattern recognition algorithms, and machine learning models to identify and eliminate yield-limiting patterns, substituting human engineers' manual analysis and trial-and-error processes with automated computational methods that operate faster and scale better with complexity
Data Source
AI summary
Methods for integrated circuit design are provided. In one embodiment, a method for determining a physical layout pattern includes accessing a layout pattern configuration graph. The graph includes layout pattern configurations meeting a circuit requirements. At least two of the layout pattern configurations are annotated with characteristics by analyzing sample layout patterns. An integrated circuit electrical design is partitioned into circuit design configurations. One of the circuit design configurations meets one of the circuit requirements. One of the layout pattern configurations is selected from the layout pattern configuration graph to meet the selected circuit requirements. In another embodiment, a method for determining a netlist for an integrated circuit electrical design is provided. In a further embodiment, a method for determining a tool configuration for a manufacturing process is provided.