IC Design Cycle Refinement via Non-Critical Path Sensitivity
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Solution Overview
Problem
The complexity of integrated circuit design and fabrication processes makes it difficult to characterize and address design and process flaws, as flaws can stem from various variances and interactions, and existing testing methods often focus on defect-driven yield issues, occupying valuable space with dedicated test structures.
Innovation Solution
The method involves utilizing functional circuitry within the integrated circuit for testing purposes, identifying and modifying non-critical paths to enhance their sensitivity to design and process parameters, allowing for evaluation and refinement of the design cycle by measuring timing data and adjusting the design or fabrication process accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated test structures are used for testing, then testing capability is provided, but valuable chip space is occupied and device complexity increases
Solution Approach 1:
The patent applies multi-functionality by making functional circuitry serve dual purposes: performing their intended functional operations while simultaneously serving as test structures for detecting design and process flaws. This eliminates the need for separate dedicated test structures, thereby preserving chip space while maintaining comprehensive testing capability.
Solution Approach 2:
The patent merges the testing function with the functional circuitry itself. Instead of having separate test structures and functional circuits, the functional circuitry is designed to perform both its functional role and its testing role, combining what were previously separate components into a unified structure that achieves both objectives.
2Reliability
If multiple test structures are added to detect various flaws, then testing coverage is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent makes existing functional circuitry multi-functional by enabling it to detect multiple types of design and process flaws simultaneously. A single functional circuit can be configured to detect various defects through different test modes, eliminating the need for multiple specialized test structures and thereby reducing overall device complexity while maintaining comprehensive testing coverage.
Solution Approach 2:
The patent utilizes parameter changes by configuring functional circuitry to operate in different test modes that detect various types of flaws. By changing operational parameters such as signal patterns, measurement conditions, or circuit configurations, the same functional circuit can detect different types of defects, providing comprehensive coverage without adding structural complexity.
3Reliability
If existing testing methods are used, then defect-driven yield issues are addressed, but sensitivity to design and process parameter variations is insufficient
Solution Approach 1:
The patent applies parameter changes by configuring functional circuitry to operate in specific test modes that are highly sensitive to particular design and process parameters. By adjusting operational parameters such as signal frequencies, voltage levels, or measurement conditions, the testing method achieves high sensitivity to parameter variations while maintaining the ability to detect defects.
Solution Approach 2:
The patent replaces traditional mechanical or physical test structures with electrical or functional testing methods that use the circuit's own operational characteristics. By substituting physical test structures with functional testing that measures electrical parameters, the method achieves higher sensitivity to design and process variations without the limitations of physical test structure geometry.
Data Source
AI summary
Systems and methods are provided for refining a design cycle for an integrated circuit. An integrated circuit design is generated. A plurality of non-critical paths within the integrated circuit design are identified. A set of at least one of the plurality of non-critical paths is modified to produce a modified design in which the sensitivity of each of the set of non-critical paths to at least one parameter is enhanced. Each parameter is either a design parameter or a process parameter. An integrated circuit is fabricated according to the modified design. The fabricated integrated circuit is evaluated to measure a set of timing data representing each of the plurality of non-critical paths. The value of the parameter is determined from the measured set of timing data.