IC Die Outlier Detection via Neural Network Pattern Screening
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Solution Overview
Problem
Integrated circuit (IC) testing fails to accurately identify defective dies before they are released to customers, leading to post-testing failures and increased research costs for manufacturers and OEMs, as existing methods do not effectively predict long-term performance and are prone to manufacturing and operational errors.
Innovation Solution
A method involving the processing of parametric data for IC dies using a neural network to determine an expected data pattern, screening individual dies by comparing their data patterns to the expected pattern, and identifying outliers based on tolerance thresholds, thereby improving yield and reducing customer returns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional testing methods are used to screen IC dies, then the testing process is simple and fast, but the accuracy of identifying defective dies is insufficient leading to post-testing failures
Solution Approach 1:
The patent introduces an intermediary AI model that acts as a mediator between traditional testing methods and defect identification. The AI model processes parametric data and generates predicted values that serve as an intermediate step to identify outliers more accurately, resolving the contradiction between simple testing and accurate defect detection.
Solution Approach 2:
The patent replaces traditional mechanical/electrical testing mechanisms with an AI-based computational system. By substituting conventional testing hardware and methods with software-based AI analysis of parametric data, the system achieves higher measurement precision while reducing physical complexity of testing equipment.
2Reliability
If traditional testing methods are used, then the testing process is fast, but post-testing failures occur increasing research costs
Solution Approach 1:
The patent performs preliminary action by using the AI model to predict long-term performance and identify potential defects before the dies are released to customers. By conducting this predictive analysis during the manufacturing process, the system prevents post-testing failures and eliminates the need for time-consuming post-failure research at customer sites.
Solution Approach 2:
The patent implements feedback by using the AI model to analyze parametric data and provide predictive information about future performance. This feedback loop allows manufacturers to identify and correct potential issues before they manifest as actual failures, improving reliability while reducing the time lost to post-failure investigation.
3Measurement precision
If comprehensive parametric data analysis is performed using neural networks, then outlier detection accuracy improves, but processing complexity and computational requirements increase
Solution Approach 1:
The patent applies segmentation by dividing the parametric data into multiple groups and processing each group separately through the neural network. This segmentation approach maintains high outlier detection accuracy by analyzing detailed patterns while reducing overall computational complexity through parallel processing of smaller data subsets.
Solution Approach 2:
The patent utilizes parameter changes by transforming raw parametric data into different representations suitable for neural network processing. By changing the parameters and features extracted from the data, the system achieves high detection accuracy while optimizing computational efficiency through appropriate data transformation and feature selection.
Data Source
AI summary
An integrated circuit method processes parametric data for each integrated circuit die in a plurality of integrated circuit die to determine an expected data pattern, screens integrated circuit die by comparing a data pattern corresponding to a plurality of parametric data for the integrated circuit die to an expected data pattern and, responsive to the comparing, determining whether a difference between the data pattern corresponding to a plurality of parametric data for the predetermined integrated circuit die and the expected data pattern is beyond a tolerance.