IC Deep N-Well Ion Discharge Paths

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Solution Overview

Problem

Integrated circuits face noise-related issues due to accumulated positive ions in deep doped wells during plasma processing, leading to damage and inconsistent performance, as existing antenna design rules do not account for front-end plasma sources.

Innovation Solution

Incorporating a second electrical path and dissipation devices connected between reference voltages to discharge positive ions accumulated in deep n-wells during back-end plasma operations, preventing ion accumulation and reducing structural damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If antenna design rules are used to manage plasma damage, then device performance consistency is improved, but they fail to account for front-end plasma sources causing ion accumulation damage

Engineering Contradiction:
Improvedevice performance consistencyVSAvoidcoverage of plasma sources
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments plasma damage management into two distinct parts: front-end plasma sources (addressed by dissipation devices) and back-end plasma sources (addressed by antenna design rules). This segmentation allows each mechanism to target specific plasma sources appropriately, resolving the limitation of antenna rules not covering front-end sources.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dissipation devices as intermediary structures between front-end plasma sources and sensitive devices. These dissipation devices act as mediators that capture and discharge positive ions accumulated during front-end plasma processing, preventing them from damaging devices while allowing antenna design rules to continue managing back-end plasma effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If dissipation devices are added to discharge positive ions, then plasma damage is reduced, but device complexity and structure size increase

Engineering Contradiction:
Improveplasma damageVSAvoidstructure size
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges dissipation devices with existing deep n-well structures and reference voltage networks. By integrating the dissipation function into existing structural elements rather than adding completely separate components, the patent reduces the increase in device complexity and size while still providing effective ion discharge capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The dissipation devices are designed to perform multiple functions: they discharge positive ions accumulated during front-end plasma processing, maintain reference voltage stability, and work cooperatively with antenna design rules for back-end plasma protection. This multi-functionality reduces the need for separate dedicated structures for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively alleviates plasma damage by discharging positive ions through electrical paths and dissipation devices, maintaining device integrity and performance without adding extra components, thus maintaining or reducing IC structure size.

Implementation Method 1

Incorporating a second electrical path and dissipation devices connected between reference voltages to discharge positive ions accumulated in deep n-wells during back-end plasma operations

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10510742B1Integrated circuit structure
Publication Date: 2019.12.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10510742B1 patent drawing
  • US10510742B1 patent drawing
  • US10510742B1 patent drawing

AI summary

An IC structure includes a substrate, a deep n-well (DNW), a first device, a second device, a first electrical path and a second electrical path. The DNW is in the substrate. The first device is formed inside the DNW and connected to a first lower reference voltage and a first higher reference voltage. The second device is formed in the substrate and outside the DNW, and connected to a second lower reference voltage and a second higher reference voltage. The first electrical path is electrically connected between the first device and the second device. The second electrical path is electrically connected between the first lower reference voltage and the second lower reference voltage. A second metal layer that includes the second electrical path is located in an area outside of an area above a first metal layer in which the first electrical path is located.