Integrated Circuit Driver Segmentation for Display Panel Chip Area Reduction
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Solution Overview
Problem
High-resolution display panels in electronic instruments require high-performance driver circuits, leading to increased circuit complexity and chip area, making it difficult to reduce manufacturing costs and provide additional functions, especially in small electronic devices where space is limited.
Innovation Solution
The integrated circuit device includes a RAM block and a data line driver block with divided data line drivers, where the wordline control circuit drives multiple wordlines and selects identical wordlines multiple times in a scan period, allowing for efficient data latching and reduced chip area by optimizing the arrangement of data line drivers along the bitlines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the circuit scale and circuit complexity are increased to achieve high performance for high-resolution display panels, then the display performance is improved, but the chip area increases and manufacturing cost cannot be reduced
Solution Approach 1:
The data line driver block is divided into first to Nth divided data line driver blocks, where each divided block drives a different data line group. This segmentation allows the driver circuit to be distributed more efficiently across the chip, reducing the concentration of circuit complexity in one area and enabling better spatial utilization, thereby reducing overall chip area while maintaining high performance for high-resolution displays
Solution Approach 2:
The divided data line drivers are disposed along the first direction in which the bitlines extend, creating a systematic spatial arrangement that optimizes the layout. This dimensional organization allows for efficient routing and reduces the area required for interconnections, addressing the chip area reduction goal while supporting high-resolution display requirements
2Reliability
If the circuit scale is increased to provide high performance for high-resolution display panels in small electronic instruments, then the display performance is improved, but the chip area increases and additional functions cannot be provided
Solution Approach 1:
By segmenting the data line driver into multiple divided blocks that can be independently configured, the circuit design becomes more flexible. This segmentation allows the same basic structure to support high-resolution displays while leaving room for additional functional blocks to be integrated, thereby providing adaptability for additional functions in small electronic instruments
Solution Approach 2:
The divided data line driver structure creates a universal platform that can serve multiple purposes. The modular architecture allows the same circuit blocks to be reused or reconfigured for different functions, enabling the driver circuit to provide high-performance display driving while also supporting additional functions within the limited space of small electronic instruments
Data Source
AI summary
An integrated circuit device includes: a RAM block including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit; and a data line driver block which drives a plurality of data line groups of a display panel based on data supplied from the RAM block. The data line driver block includes first to Nth (N is an integer larger than one) divided data line driver blocks, each of the first to Nth divided data line driver blocks driving a different data line group of the data line groups. The wordline control circuit drives an identical wordline N times from among the wordlines in one horizontal scan period of the display panel. The first to Nth divided data line drivers are disposed along a first direction in which the bitlines extend.