Integrated Circuit Dynamic Frequency Scheduling for Power and Throughput
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Solution Overview
Problem
The reduction in feature sizes of integrated circuits (ICs) leads to increased power dissipation challenges, and existing dynamic voltage and frequency scheduling (DVFS) approaches negatively impact throughput performance, especially in applications requiring high throughput.
Innovation Solution
An integrated circuit (IC) with a first and second data processing unit that operates at a high frequency in a high power mode and dynamically adjusts frequency based on data dependencies in a low power mode to maintain throughput while reducing power consumption, using a controller to generate control signals and adjust voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If dynamic voltage and frequency scheduling (DVFS) is used to reduce power consumption, then power dissipation is reduced, but throughput performance deteriorates
Solution Approach 1:
The patent implements dynamic frequency adjustment where the operating frequency is varied based on the degree of data dependency detected in instruction streams. When data dependency is high, frequency is reduced to save power; when data dependency is low, frequency is maintained high to preserve throughput. This dynamic adaptation resolves the contradiction by making the system flexible rather than fixed at one frequency level.
Solution Approach 2:
The system changes the operating frequency parameter dynamically based on detected data dependency characteristics. By monitoring the instruction stream and adjusting frequency as a variable parameter rather than using a fixed value, the system optimizes the trade-off between power consumption and throughput performance for different computational workloads.
2Quantity of substance
If feature size is reduced to increase component density, then integration capacity is improved, but power dissipation control becomes more difficult
Solution Approach 1:
The patent adjusts operating frequency as a controllable parameter to manage power dissipation in high-density ICs. By varying frequency based on data dependency patterns, the system controls power consumption without changing the physical feature size or component density, thus addressing the power control challenge in miniaturized ICs.
3Productivity
If parallelism is introduced to improve throughput, then processing capacity is improved, but heat generation increases
Solution Approach 1:
The system dynamically adjusts frequency based on the actual data dependency characteristics of the instruction stream. When instructions are highly parallelizable, the system can operate at lower frequencies to reduce heat generation while maintaining throughput. When data dependencies require sequential execution, frequency is adjusted accordingly. This dynamic approach allows the system to manage thermal output while preserving processing capacity.
Data Source
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AI summary
Disclosed is an integrated circuit (100) comprising a set of data processing units (120, 130) including a first data processing unit (120) and at least one second data processing unit (130) operable at variable frequencies, wherein the integrated circuit is adapted in a low power mode to distribute said plurality of instructions over the first data processing unit and the at least one second data processing unit based on data dependencies between the instructions, and is adapted to adjust the operating frequency of the first data processing unit and the at least one second data processing unit as a function of the evaluated data dependencies. An electronic device comprising such an IC and a method of scheduling instructions for such an IC are also disclosed.