IC Optical Edge Coupler Layout for Same-Side Multi-Stage Testing

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Solution Overview

Problem

The challenge of simultaneously testing electrical and optical functions in integrated circuits (ICs) is complicated by the placement of electrical and optical input/output points on opposite sides of the device, leading to ineffective optical testing due to signal loss and the inability to test at multiple fabrication stages, resulting in high device rejection rates.

Innovation Solution

The IC device facilitates same-side electrical and optical testing by incorporating conductive pads and trenches that allow access to photodetectors and optical edge detectors from the same surface, enabling testing at multiple fabrication stages through a combined P-IC and E-IC structure, with conductive pads and trenches on both the upper and lower surfaces of the P-IC structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrical and optical input/output points are placed on opposite sides of the IC device, then electrical testing can be performed, but optical testing becomes ineffective due to signal loss

Engineering Contradiction:
Improveoptical testing effectivenessVSAvoidoptical signal loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent introduces trenches extending from the top surface into the substrate to provide optical access paths from the same side where electrical pads are located. This dimensional change allows optical signals to reach photodetectors without traversing the entire device thickness from the opposite side, thereby reducing signal loss while maintaining effective optical testing capability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If testing is performed only at the final fabrication stage, then device functionality can be verified, but device rejection rates increase due to inability to test at intermediate stages

Engineering Contradiction:
Improvedevice functionality verificationVSAvoiddevice rejection rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent enables optical testing to be performed at multiple fabrication stages including intermediate stages before final device assembly. By providing accessible optical paths and photodetectors that can be tested early in the fabrication process, defective devices can be identified and rejected sooner, preventing waste of subsequent processing steps and reducing overall rejection rates

Inventive Principle:
Principle #10Preliminary action

3Reliability

If separate testing procedures are used for electrical and optical functions, then each function can be tested independently, but testing efficiency decreases and process complexity increases

Engineering Contradiction:
Improveindependent function testingVSAvoidtesting efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines electrical and optical testing capabilities on the same side of the device by locating both electrical pads and optical access trenches with photodetectors in proximity. This allows simultaneous or sequential testing of both electrical and optical functions using the same access side, improving testing efficiency while maintaining the ability to independently verify each function

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides accurate and efficient simultaneous electrical and optical testing at multiple stages, improving chip yield determination and process monitoring, reducing device rejection by allowing testing with existing equipment.

Implementation Method 1

an optical edge coupler disposed in the first dielectric layer and optically coupled to the photodetector

Methodology Applied
Scientific EffectPhotoelectric Effect: Photoelectric Effect

Data Source

PatentUS20250293099A1Same-side combined electrical/optical testing at multiple IC device fabrication stages
Publication Date: 2025.09.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250293099A1 patent drawing
  • US20250293099A1 patent drawing
  • US20250293099A1 patent drawing

AI summary

Some embodiments relate to an integrated circuit (IC) device that includes a substrate including a first surface and a second surface, a first dielectric layer disposed over the second surface of the substrate, a photodetector and an optical edge coupler disposed in the first dielectric layer, at least one dielectric layer disposed over the first dielectric layer, a conductive structure disposed in the at least one dielectric layer, a conductive pad disposed at a surface of the IC device, and a trench extending from the surface of the IC device toward the substrate. The conductive pad is electrically coupled to the photodetector by way of the conductive structure. The optical edge coupler is optically coupled to the photodetector and configured to receive light from a sidewall of the trench.