IC Vulnerability Assessment for Fault Injection Security
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Solution Overview
Problem
Current technologies lack effective methods for assessing the vulnerability of integrated circuits (ICs) to fault-injection attacks at the early design stage, leading to inefficient and costly protection measures.
Innovation Solution
A security property-driven vulnerability assessment framework that characterizes fault models and generates a fault list based on executable security properties, enabling the identification of critical locations in IC designs susceptible to fault-injection attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If intrusion detection countermeasures are implemented to prevent fault-injection attacks, then security is improved, but area overhead and cost increase significantly
Solution Approach 1:
The patent applies local quality by implementing protection only at critical locations identified through vulnerability assessment, rather than uniformly across the entire design. The assessment framework identifies specific vulnerable locations where fault-injection attacks can compromise security properties, and protection mechanisms are selectively applied only at these locations, thereby reducing area overhead while maintaining security.
Solution Approach 2:
The patent segments the design protection problem into two parts: (1) vulnerability assessment to identify critical locations, and (2) selective protection implementation. This segmentation allows the system to distinguish between vulnerable and non-vulnerable regions, applying protection only where necessary rather than treating the entire design uniformly.
2Reliability
If error detection countermeasures are implemented to detect injected faults, then security is improved, but area overhead reaches 100%
Solution Approach 1:
The patent eliminates the need for universal error detection by using vulnerability assessment to identify only critical locations requiring protection. By applying protection selectively at these identified locations rather than throughout the entire design, area overhead is dramatically reduced from 100% to only the necessary portions.
Solution Approach 2:
The patent performs preliminary vulnerability assessment during the design stage to identify critical locations before implementation. This preliminary action allows protection to be targeted precisely at vulnerable locations rather than requiring comprehensive post-implementation error detection across the entire system.
3Reliability
If protection is applied to the whole design, then security coverage is improved, but resource consumption and design complexity increase
Solution Approach 1:
The patent applies local quality by differentiating between critical and non-critical locations through vulnerability assessment. Protection mechanisms are applied with different intensities or types based on the assessed vulnerability of each location, rather than applying uniform protection across the entire design, thereby reducing overall complexity.
Solution Approach 2:
The patent segments the design into vulnerable and non-vulnerable components through systematic assessment. This segmentation enables the design team to focus complexity only on protecting critical locations while leaving non-critical areas unprotected, reducing overall design complexity while maintaining adequate security coverage.
4Reliability
If comprehensive protection is implemented, then security against fault-injection attacks is improved, but manufacturing cost increases
Solution Approach 1:
The patent reduces manufacturing cost by applying protection only at critical locations identified through vulnerability assessment, rather than implementing comprehensive protection across the entire design. This localized approach minimizes the amount of protective circuitry required, directly reducing manufacturing costs while maintaining security at vulnerable points.
Solution Approach 2:
The patent applies partial action by implementing protection only to the extent necessary for security - specifically at critical locations identified by the assessment framework. Rather than applying excessive protection uniformly across the entire design, the system applies just enough protection where needed, reducing manufacturing cost while achieving security objectives.
Data Source
AI summary
Various embodiments provide methods, systems, computer program products, apparatuses, and/or the like for assessing vulnerability of an IC design to fault injection attacks, such as through a security property-driven vulnerability assessment framework for efficiently evaluating faults with respect to certain security properties associated with the IC design. In one embodiment, a method is provided. The method includes generating, using a fault-injection technique specification, one or more fault models describing attributes of one or more faults. The method further includes selecting, using the fault models and executable security properties associated with a design file of an IC design, a fault list identifying a plurality of possible faults for the IC design. The method further includes identifying, based at least in part on performing a fault simulation on the design file with the fault list, critical locations of the IC design. The method further includes implementing protections at the critical locations.