Integrated Circuit Fault Prediction via Artificial Aging
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Solution Overview
Problem
Integrated circuits face age-related failures due to increased transmission delays, particularly in logical gates, which are difficult to detect using existing fault prediction methods, especially infrequent faults that can lead to performance degradation or complete failure.
Innovation Solution
A prediction technique that artificially ages one redundant circuit module to mimic increased gate delays, allowing for comparison with an un-aged module to detect errors, using methods like lowering operating voltage or decreasing slack time, providing high accuracy and generality in fault detection with reduced power and resource overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant circuit modules are operated in parallel for fault detection, then fault detection capability is improved, but power consumption and design complexity increase significantly
Solution Approach 1:
The patent implements periodic sampling of circuit module outputs at specified intervals rather than continuous monitoring. The reliability circuitry captures outputs from redundant circuit modules only at periodic time points, reducing power consumption while maintaining fault detection capability through intermittent comparison of module outputs.
Solution Approach 2:
The patent uses output copying and comparison between redundant circuit modules instead of direct continuous monitoring. The reliability circuitry captures and compares outputs from multiple modules, detecting faults through output discrepancies rather than requiring continuous operation of all modules, thereby reducing power overhead.
2Use of energy by moving object
If sampling approach is used to reduce power overhead, then power consumption is reduced, but infrequent faults may be missed
Solution Approach 1:
The patent applies preliminary artificial aging to circuit modules before normal operation to induce early signs of degradation. By pre-stressing modules through controlled aging processes and then monitoring their outputs during operation, the system can detect potential faults before they manifest as actual failures, improving detection coverage without continuous monitoring.
Solution Approach 2:
The patent changes operational parameters by applying different voltage levels or timing conditions to circuit modules during aging and operation. By varying these parameters and comparing outputs under different conditions, the system enhances its ability to detect infrequent faults that would otherwise remain hidden during normal operation.
3Reliability
If canary-based fault prediction is used, then fault prediction capability is improved, but accuracy is reduced due to difficulty in matching canary circuit to target circuit
Solution Approach 1:
The patent makes circuit modules universal by having them perform both their primary computational functions and fault prediction functions. The same circuit modules that execute normal operations also serve as the basis for fault detection through output comparison, eliminating the need for separate canary circuits and ensuring accurate prediction based on actual operational behavior.
Solution Approach 2:
The patent uses output comparisons as an intermediary mechanism to detect faults. Rather than directly monitoring physical degradation, the system compares outputs from redundant modules to detect discrepancies that indicate potential faults, providing accurate prediction without requiring exact physical matching of test circuits to target circuits.
4Measurement precision
If in-situ fault prediction is used, then prediction accuracy is improved, but generality is reduced as only a small subset of gates can be monitored
Solution Approach 1:
The patent enables all circuit modules to serve dual purposes: performing their primary computational functions and participating in fault detection. By having every module contribute to both computation and reliability monitoring through output comparison, the system achieves both high accuracy (in-situ monitoring) and full generality (all modules monitored).
Solution Approach 2:
The patent merges the computational function and fault detection function into a unified system. The outputs of computational modules are simultaneously used for both their intended purposes and for reliability comparison, combining multiple functions into the same hardware resources and achieving both accuracy and comprehensive coverage.
Data Source
AI summary
The prediction of hardware failure is obtained by operating two redundant circuit modules while one circuit module is artificially aged. The output of the two circuit modules is compared and a discrepancy between outputs indicates a projected failure of the aged modules. Aging may be accomplished by one or a combination of lowering operating voltages and re-phasing a sampling clock to reduce slack time both of which provide increased sensitivity to gate delay.