Integrated Circuit Function Transformation via Netlist Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for detecting and removing hardware Trojans in integrated circuits are inefficient, unable to handle complex logic patterns, and fail to guarantee 100% detection, leading to security concerns and resource-intensive processes.
Innovation Solution
A method that compares netlists to detect and locate hardware Trojans by extracting arithmetic macros, using reverse engineering and formal verification to generate patches that restore the circuit to its original specification, reducing runtime complexity and resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional hardware Trojan detection methods are used, then detection capability is provided, but detection efficiency is low and cannot handle complex logic patterns
Solution Approach 1:
The patent segments the complex circuit design into multiple versions (original design and multiple modified versions). By comparing these segmented versions, the system can efficiently detect hardware Trojans without needing to analyze the entire complex circuit at once, thus improving detection efficiency while maintaining capability to handle complex logic patterns.
Solution Approach 2:
The patent creates multiple copies (modified versions) of the original circuit design with systematic variations. These copies serve as reference points for comparison, enabling efficient detection of unauthorized modifications (hardware Trojans) through differential analysis, thereby improving detection efficiency without sacrificing detection accuracy for complex patterns.
2Productivity
If existing Engineering Change Order (ECO) techniques are used to transform IC function, then function transformation is achieved, but the process is slow and inefficient
Solution Approach 1:
The patent performs preliminary actions by pre-generating multiple modified versions of the circuit design before the actual ECO process. This preparation work includes creating systematic variations of the design, which are then ready for rapid comparison and selection during the ECO process, significantly reducing the time required for function transformation.
Solution Approach 2:
The patent creates multiple copies of the original design with pre-computed modifications. These copies serve as ready-to-evaluate options during the ECO process, allowing rapid selection of appropriate design changes without performing time-consuming analysis during the actual transformation process.
3Reliability
If hardware Trojans are detected and masked, then circuit security is improved, but additional patches and modifications are required
Solution Approach 1:
The patent performs preliminary detection and identification of hardware Trojans by comparing multiple design versions before finalization. By detecting and masking Trojans in the design phase rather than after fabrication, the system improves circuit security while minimizing the need for additional physical patches and modifications to the manufactured device.
Solution Approach 2:
The patent extracts and identifies the specific locations of hardware Trojans through comparison of design versions. By precisely locating and removing only the malicious components rather than applying broad patches, the system improves security while minimizing added complexity to the circuit design.
Data Source
AI summary
A method to transform the function of a circuit is provided. The method provides a first register-transfer level (RTL) document and a second RTL document, provides a first gate level (GTL) netlist and a second GTL netlist, compares the two RTL documents to identify the instances to be modified, locates the instances to be modified in the first GTL netlist, and transforms the function of the circuit by patching the circuit such that the patched first GTL netlist is equivalent to the second GTL netlist. The method improves performance and efficiency of the transformation by reducing the number of instances to be input into the engineering change order (ECO) engine, and also minimizes change in circuit design.