Patterned Ground Shield for IC Inductor Noise Reduction

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Solution Overview

Problem

Integrated circuit (IC) inductors face challenges such as noise coupling from the substrate, parasitic capacitances, and electric field-induced eddy currents, which degrade the quality factor (Q) of the inductor, leading to inefficiencies in RF circuits.

Innovation Solution

An inductor structure within an IC featuring a patterned ground shield with conductive fingers and an isolation wall, strategically positioned to minimize electric field impact while maintaining magnetic field efficiency, coupled to the substrate or P-type diffusion material to reduce noise and parasitic effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If an IC inductor is implemented over a common substrate material, then manufacturing cost is reduced, but noise coupling from the substrate increases

Engineering Contradiction:
Improvemanufacturing costVSAvoidnoise coupling
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

A patterned ground shield structure is introduced as an intermediary element between the substrate and the inductor coil. This shield comprises multiple conductive fingers arranged in a specific pattern, which acts as a mediator to block noise coupling paths from the substrate to the inductor while maintaining the benefit of integrated implementation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The ground shield is segmented into multiple discrete conductive fingers rather than forming a continuous ground plane. This segmentation reduces parasitic capacitance between the shield and the substrate while maintaining effective noise blocking, thereby improving the quality factor of the inductor.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If metal interconnect layers are used to form the IC inductor, then integration is improved, but parasitic capacitances between the substrate and metal layers increase

Engineering Contradiction:
ImproveintegrationVSAvoidparasitic capacitance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patterned ground shield serves as an intermediary layer between the substrate and the metal interconnect layers forming the inductor. This intermediate structure provides electromagnetic isolation, reducing parasitic capacitance coupling between the substrate and the metal layers while maintaining integration benefits.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If the inductor is implemented within the IC, then system cost is reduced, but electric field coupling induces eddy currents in the substrate

Engineering Contradiction:
Improvesystem costVSAvoideddy current losses
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patterned ground shield acts as a mediator that blocks electric field lines from reaching the conductive substrate. By intercepting these electric fields, the shield prevents the induction of eddy currents in the substrate, thereby reducing energy losses and improving the quality factor.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shield structure modifies the electromagnetic field distribution parameters in the region between the inductor and substrate. By changing the field configuration through the presence of the patterned shield, eddy current induction is minimized while maintaining cost-effective integration.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the quality factor (Q) of the inductor by isolating electric fields and reducing noise and parasitic capacitance, thereby improving the efficiency and performance of RF circuits within ICs.

Implementation Method 1

Coupling of the electric fields of an IC inductor can induce eddy currents within the substrate layer

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 2

an inductor structure within an IC featuring a patterned ground shield with conductive fingers and an isolation wall, strategically positioned to minimize electric field impact while maintaining magnetic field efficiency

Methodology Applied
Scientific EffectMagnetic Field: Magnetic Field

Implementation Method 3

Another non-ideality of an IC inductor can include parasitic capacitances that exist between the substrate layer and the metal interconnect layer(s) used to form the IC inductor

Methodology Applied
Scientific EffectParasitic Capacitance: Parasitic Capacitance

Data Source

PatentUS8427266B2Integrated circuit inductor having a patterned ground shield
Publication Date: 2013.04.23 XILINX INC
  • US8427266B2 patent drawing
  • US8427266B2 patent drawing
  • US8427266B2 patent drawing

AI summary

An inductor structure can be implemented within a semiconductor integrated circuit (IC). The inductor structure can include a coil of conductive material having a first terminal and a second terminal each located at an opposing end of the coil. The inductor structure can include a patterned ground shield including a plurality of fingers implemented within an IC process layer located between the coil of conductive material and a substrate of the IC. The inductor structure also can include an isolation wall formed to encompass the coil and the patterned ground shield. The isolation wall can be coupled to one end of each finger.