Integrated Circuit Inference Computation Power and Accuracy Balance
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Solution Overview
Problem
Current technologies face inefficiencies in processing large amounts of image data from image sensors, particularly in performing intensive computations like multiplications and accumulations, which are resource-intensive and power-consuming, especially when using general-purpose microprocessors.
Innovation Solution
An integrated circuit device is configured with an image sensing pixel array, a memory cell array, and inference computation circuits, utilizing hybrid bonding for direct connections between the image sensor chip and memory chip, enabling efficient multiplication and accumulation operations through a 3D memory array, allowing for on-chip processing of image data with reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If image data is transmitted from image sensors to general-purpose microprocessors for processing, then computation capability is improved, but power consumption increases and processing efficiency decreases
Solution Approach 1:
The patent merges the image sensor and processing circuits into a single integrated device. The pixel array is directly connected to memory cells and inference computation circuits on the same chip, eliminating the need for external data transmission and enabling on-chip processing of image data through multiplication and accumulation operations.
Solution Approach 2:
The patent introduces specialized inference computation circuits as an intermediary between the image sensor and general-purpose microprocessors. These circuits include multiplication units and accumulation units that process image data locally, reducing the burden on external processors and lowering overall system power consumption.
2Productivity
If specialized circuits like MAC units are implemented using memristor crossbars, then computation performance is improved, but device complexity increases
Solution Approach 1:
The patent segments the processing function into distinct modules: pixel arrays for data generation, memory cell arrays for weight storage, and separate multiplication and accumulation units for computation. This modular segmentation achieves high computation performance while maintaining manageable device complexity through organized functional blocks.
Solution Approach 2:
The memory cell array serves multiple functions: storing weight data for inference computations and potentially storing image data. The integrated circuit is designed to perform both multiplication and accumulation operations using shared resources, reducing overall device complexity while maintaining high computation performance.
Data Source
AI summary
A method to balance computation accuracy and energy consumption, including: programming thresholds voltages of first memory cells to store first weight matrices representative of a first artificial neural network; programming thresholds voltages of second memory cells to store second weight matrices representative of a second artificial neural network smaller than the first artificial neural network, where both the first artificial neural network and the second artificial neural network are operable to provide at least one common functionality in processing each of the inputs; selecting configurations of using the first memory cells, or the second memory cells, or both in processing a sequence of inputs; and performing, according to the configurations, operations of multiplication and accumulation using the first memory cells, and the second memory cells in computations of the first artificial neural network and the second artificial neural network in processing the sequence of the inputs.