Electrical Discontinuities in IC Interconnects for Reverse Engineering Protection
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Solution Overview
Problem
Integrated circuits are vulnerable to reverse engineering due to the ease of extracting their description from photographic views, which complicates their protection and functional integrity.
Innovation Solution
The introduction of electrical discontinuities between metallization levels in the integrated circuit's interconnection part, specifically between via levels, using an insulating encapsulation layer and identical material composition for the IMD and additional insulating layers, making the discrimination of vias difficult and rendering reverse engineering complicated.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If standard fabrication processes are used without additional material, then manufacturing complexity is reduced, but reverse engineering protection is insufficient
Solution Approach 1:
The patent changes the electrical continuity parameter of existing interconnection structures by forming discontinuities in vias or metal tracks. This is achieved through selective removal or modification of conductive material parameters, transforming functional connections into isolated segments without adding new material layers or structures.
Solution Approach 2:
The patent applies local quality by creating discontinuities at specific locations within the interconnection structure. Rather than modifying the entire circuit, only selected vias or metal track segments are altered to have electrical discontinuities, while maintaining normal continuity elsewhere. This localized modification provides protection at critical points without affecting overall circuit functionality.
2Reliability
If electrical discontinuities are formed to protect against reverse engineering, then circuit protection is improved, but detection difficulty must be maintained
Solution Approach 1:
The patent uses copying by creating visual replicas of normal interconnection structures. The discontinuities are formed in such a way that they replicate the appearance of standard via or track structures in photographic views, making them indistinguishable from legitimate connections. This visual copying prevents reverse engineering while maintaining the electrical isolation function.
Solution Approach 2:
The patent converts the potentially harmful effect of visible discontinuities (which might reveal protection mechanisms) into a benefit by making the discontinuities invisible in standard views. What could be seen as a defect or anomaly is transformed into an undetectable protective feature that appears as normal circuit structure in photographic inspections.
3Reliability
If additional insulating layers are used to create discontinuities, then protection effectiveness increases, but manufacturing complexity increases
Solution Approach 1:
The patent applies taking out by removing or isolating conductive material to create discontinuities, rather than adding insulating layers. The discontinuity is formed by extracting or separating the conductive path at specific points, utilizing the existing insulating matrix to maintain isolation. This approach reduces structural complexity by using subtraction rather than addition.
Solution Approach 2:
The patent makes the existing insulating materials serve multiple functions: they continue to provide electrical isolation between adjacent conductors while also forming the matrix in which discontinuities are created. The insulating layer becomes a multi-functional element that supports both normal insulation and the creation of protected discontinuities, eliminating the need for separate protective layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The electrical discontinuities are virtually undetectable by photographic means, ensuring the circuit's operational integrity and complicating reverse engineering, thereby enhancing protection against unauthorized extraction of the circuit's description.
Implementation Method 1
a coating of the internal wall of each orifice and of said part of the third track by an additional insulating layer of identical composition to that of the inter-metallization level insulating layer
Data Source
AI summary
An integrated circuit includes an interconnection part with a via level situated between a lower metallization level and an upper metallization level. The lower metallization level is covered by an insulating encapsulation layer and an inter-metallization level insulating layer. An electrical discontinuity is provided between a via of the via level and a metal track of the lower metallization level. The electrical discontinuity is formed by an additional insulating layer having a material composition identical to that of the inter-metallization level insulating layer. The electrical discontinuity is situated between a bottom of the via and a top of the metal track, with the discontinuity being bordered by the insulating encapsulation layer.


