Integrated Circuit Interdependency Analysis Using State-Change Vectors

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Solution Overview

Problem

Current integrated-circuit design and simulation tools face difficulties in accurately modeling and addressing signal integrity and cross-talk issues, which degrade performance and increase costs in designing and manufacturing large integrated circuits.

Innovation Solution

A device selects a sub-group of state-change difference vectors to test circuits, calculating statistical relationships between sub-circuits to identify interdependencies, allowing for effective characterization and testing without detailed circuit analysis, thereby improving design, manufacturing yields, and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If existing integrated-circuit design and simulation tools are used to model cross-talk, then signal integrity can be analyzed, but the process becomes very difficult and time-consuming

Engineering Contradiction:
Improvecross-talk modeling accuracyVSAvoidmodeling time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts and isolates only the critical subset of state-change difference vectors that represent worst-case cross-talk scenarios, rather than analyzing all possible vectors. This extraction approach maintains measurement precision for cross-talk modeling while dramatically reducing the time required by focusing computational resources on the most significant cases only.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter selection criteria from exhaustive enumeration to statistically significant sampling based on interdependencies. By transforming the approach from analyzing all state-change difference vectors to selecting a representative subset based on calculated interdependencies, the system achieves accurate cross-talk modeling with reduced computational time.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If detailed circuit analysis is performed to characterize interconnects, then signal integrity can be improved, but design and manufacturing costs increase

Engineering Contradiction:
Improvesignal integrityVSAvoiddesign cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts only the essential interdependency relationships between sub-circuits that significantly impact signal integrity, rather than performing exhaustive detailed analysis of all circuit components. This selective extraction maintains reliability by capturing the critical factors while reducing design costs through simplified analysis.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by performing analysis on a selected subset of state-change difference vectors rather than all possible vectors. This partial analysis approach provides sufficient signal integrity characterization for design decisions without incurring the full cost of exhaustive detailed circuit analysis.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If all state-change difference vectors are used for circuit testing, then testing completeness is achieved, but testing time and complexity increase significantly

Engineering Contradiction:
Improvetesting completenessVSAvoidtesting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts a representative subset of state-change difference vectors based on calculated interdependencies between sub-circuits. This extraction maintains testing completeness for critical cross-talk scenarios while reducing testing complexity by eliminating redundant test cases that do not contribute significantly to detecting interconnect issues.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by using a selected subset of state-change difference vectors for testing rather than all possible vectors. This approach achieves sufficient testing completeness for signal integrity verification while significantly reducing testing complexity and resource requirements.

Inventive Principle:
Principle #16Partial or excessive action

4Reliability

If the number of state-change difference vectors is increased to cover more logic levels and fan-in, then testing coverage improves, but the size of the vector group increases

Engineering Contradiction:
Improvetesting coverageVSAvoidnumber of state-change difference vectors
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts only the most significant state-change difference vectors that contribute to testing coverage for critical logic levels and fan-in scenarios. This extraction maintains adequate testing coverage while reducing the total quantity of vectors required, based on interdependency analysis that identifies which vectors provide unique and valuable test information.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8099705B2Technique for determining circuit interdependencies
Publication Date: 2012.01.17 ORACLE AMERICAN INC
  • US8099705B2 patent drawing
  • US8099705B2 patent drawing
  • US8099705B2 patent drawing

AI summary

Embodiments of a device (such as a computer system or a circuit tester), a method, and a computer-program product (i.e., software) for use with the device are described. These systems and processes may be used to statistically characterize interdependencies between sub-circuits in an integrated circuit (which are referred to as ‘aggressor-victim relationships’). In particular, statistical relationships between the aggressors and victims are determined from values of a performance metric (such as clock speed) when the integrated circuit fails for a group of state-change difference vectors. Using these statistical relationships, a worst-case sub-group of the state-change difference vectors, such as the worst-case sub-group, is selected. This sub-group can be used to accurately test the integrated circuit.