Integrated Circuit Interposer Carrier Structure

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Solution Overview

Problem

Existing electronic packaging solutions with interposing functionality are complex and difficult to control, especially when miniaturized semiconductor chips have high contact density, making direct contact with external circuitry challenging.

Innovation Solution

A packaged integrated circuit design featuring a core structure with a through passage cavity, an integrated circuit component, an electrically insulating cover, and a conducting redistribution arrangement using a polyimide layer and adhesive layer for reliable attachment and electrical connection to external circuitry, allowing for easy and reliable packaging with interposing functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an interposer is used to spread connections to a wider pitch, then the spatial density of contact elements is reduced, but the device complexity increases

Engineering Contradiction:
Improvecontact element spacingVSAvoidpackage structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the interposer functionality with the carrier structure by integrating the redistribution arrangement directly into the carrier. This combines what would traditionally be separate components (interposer and carrier) into a single integrated structure, reducing overall device complexity while maintaining the pitch multiplication function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The carrier structure is designed to perform multiple functions: it provides mechanical support, electrical connection, and pitch multiplication through the integrated redistribution arrangement. This multi-functionality eliminates the need for a separate dedicated interposer component.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If additional process steps are added to integrate interposing functionality, then the pitch multiplication capability is achieved, but the ease of manufacture decreases

Engineering Contradiction:
Improveconnection routingVSAvoidpackaging process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The redistribution arrangement is pre-formed as part of the carrier structure before the IC component is mounted. This preliminary integration of the pitch multiplication function into the carrier simplifies the overall packaging process by eliminating subsequent steps that would be required to add interposer functionality after component attachment.

Inventive Principle:
Principle #10Preliminary action

3Area of moving object

If the spatial density of contact elements is increased on miniaturized chips, then the chip area is reduced, but the ease of operation for direct contacting decreases

Engineering Contradiction:
Improvechip areaVSAvoiddirect contact capability
Core Design Contradiction:
Area of moving objectVSEase of operation

Solution Approach 1:

The integrated redistribution arrangement acts as an intermediary between the high-density contact elements on the miniaturized chip and the external circuitry. It mediates the connection by providing pitch multiplication and routing, making the high-density contacts operable with standard external connectors.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution simplifies the packaging process by using a polyimide layer and adhesive layer for reliable attachment and high-density redistribution, providing mechanical stability and efficient electrical connection, particularly beneficial for high-frequency applications.

Implementation Method 1

the adhesive layer is directly attached on the one hand to an upper surface of the polyimide layer and on the other hand to a lower surface of the core structure and (or respectively) to a lower surface of the component

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

an electrically insulating carrier structure formed below a lower surface of the core structure and (or respectively) below a lower surface of the component; wherein the carrier structure comprises at least a polyimide layer

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS11605569B2Packaged integrated circuit with interposing functionality and method for manufacturing such a packaged integrated circuit
Publication Date: 2023.03.14 AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG
  • US11605569B2 patent drawing
  • US11605569B2 patent drawing

AI summary

A packaged integrated circuit includes a core structure with a cavity therein; a component accommodated in the cavity; an electrically insulating structure formed over the core structure and the component; a partially electrically insulating carrier structure formed below the core structure and the component; and an electrically conducting redistribution arrangement formed at least partially within the carrier structure. The redistribution arrangement includes conductor structures each having a first element extending through the carrier structure and electrically connecting a contact of the component and a second element below the carrier structure. A part of the second element is a contact pad for electrically connecting the redistribution arrangement with external circuitry. The carrier structure includes a polyimide layer and an adhesive layer. The adhesive layer is directly attached to an upper surface of the polyimide layer and to a lower surface of the core structure and a lower surface of the component.