IC Layout With Fake Contacts for Reverse Engineering Protection

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Solution Overview

Problem

Integrated circuits (ICs) are vulnerable to reverse engineering (RE) attacks, which can lead to cloning, intellectual property loss, and security weaknesses due to the lack of protection against RE.

Innovation Solution

The implementation of a reverse engineering protection method that involves blocking contacts to connect two layers and making the layout of cells with different functions indistinguishable from each other, using a combination of real and fake contact structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional IC design is used, then manufacturing and design efficiency is maintained, but the IC becomes vulnerable to reverse engineering attacks leading to cloning and IP loss

Engineering Contradiction:
ImproveSecurity against reverse engineeringVSAvoidLayout complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates fake contact structures that are visual copies of real contact structures. These fake contacts appear identical in the layout to real contacts but are non-functional, making reverse engineering impossible since attackers cannot distinguish between functional and non-functional contacts. This copying approach protects the actual circuit design while maintaining normal functionality.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent applies different properties to different parts of the contact structures. Real contacts have electrical connectivity while fake contacts do not, yet both appear identical in the layout. This local differentiation in functionality while maintaining uniform appearance solves the contradiction by providing security through indistinguishability rather than through visible complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If protection mechanisms are added to prevent reverse engineering, then security is improved, but manufacturing complexity increases

Engineering Contradiction:
ImproveProtection against cloningVSAvoidFabrication process simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses a single fabrication process that handles both real and fake contact structures uniformly. The same photomask patterns and deposition steps create both functional and non-functional contacts, eliminating the need for separate manufacturing lines or complex process variations. This universal approach maintains ease of manufacture while providing security.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

By creating fake contacts that are indistinguishable from real contacts throughout the entire manufacturing process, the patent avoids adding complex verification or differentiation steps. The copying approach ensures that standard fabrication tools and processes can produce both types of contacts without modification, preserving manufacturing simplicity.

Inventive Principle:
Principle #26Copying

3Reliability

If real and fake contact structures are mixed in the layout, then reverse engineering is prevented, but device area increases

Engineering Contradiction:
ImproveIndistinguishability of contactsVSAvoidIC chip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the functions of real and fake contact structures into a single layout layer. Both types of contacts share the same geometric patterns, spacing, and distribution, allowing them to be manufactured together without requiring additional area for separate protection structures. The security feature is integrated into the existing contact grid rather than added as a separate layer.

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If indistinguishable contact structures are implemented, then intellectual property protection is achieved, but design time increases

Engineering Contradiction:
ImproveIP protectionVSAvoidDesign development time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent incorporates fake contact structures during the initial layout design phase rather than as a post-processing addition. By planning the distribution and placement of both real and fake contacts simultaneously, the design process flows more efficiently without requiring separate steps for security feature integration, thus reducing overall design time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12283554B2Integrated circuit layout, integrated circuit, and method for fabricating the same
Publication Date: 2025.04.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12283554B2 patent drawing
  • US12283554B2 patent drawing
  • US12283554B2 patent drawing

AI summary

An integrated circuit layout is provided. The integrated circuit layout includes: a first active region having a first plurality of field effect transistors (FETs); and an interconnect contacting sources and drains of the first plurality of FETs in the first active region through a first set of contact structures. At least one of the first set of contact structures is electrically non-conductive.