IC Layout Fill Cell Redistribution for Density Uniformity
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Solution Overview
Problem
In integrated circuit (IC) fabrication, the presence of large gaps without features in IC layouts can lead to manufacturing errors due to low feature density, which is often addressed by adding non-functional fill regions, but their shape and position must comply with specific specifications, making layout adjustments challenging.
Innovation Solution
A method is introduced to identify target fill regions without fill cells and adjacent fill-dense regions with high feature density, where fill cells are removed from the fill-dense regions and duplicated in the target fill regions to maintain or achieve the required feature density, thereby improving manufacturability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fill cells are added to increase feature density in gap regions, then manufacturing reliability improves, but layout complexity and specification compliance difficulty increase
Solution Approach 1:
The patent copies existing fill cell patterns from fill-dense regions and places them in target fill regions. This copying approach maintains specification compliance while improving feature density uniformity, as the copied patterns have already been validated to meet design rules
Solution Approach 2:
The patent applies different strategies to different regions: fill cells are removed from fill-dense regions and added to target fill regions. This local differentiation optimizes feature density distribution without uniformly complicating the entire layout
2Stability of the object's composition
If fill cells are relocated from fill-dense regions to target fill regions, then feature density uniformity improves, but the risk of violating minimum feature density specifications increases
Solution Approach 1:
The patent implements an iterative feedback loop that continuously monitors feature density after each fill cell relocation. The process checks whether minimum density specifications are maintained and adjusts subsequent operations accordingly, ensuring specification compliance while achieving uniformity
Solution Approach 2:
The patent performs partial relocation of fill cells rather than complete transfer, maintaining sufficient fill cell count in original regions while adequately filling target regions. This partial action approach balances uniformity improvement with specification compliance
3Manufacturing precision
If iterative correction and re-design of fill regions is performed, then specification compliance is achieved, but manufacturing time and process complexity increase
Solution Approach 1:
The patent performs preliminary identification of target fill regions and fill-dense regions before any relocation operations. This advance planning reduces the need for iterative corrections by establishing a clear relocation strategy from the outset
Solution Approach 2:
The patent uses copying of validated fill cell patterns to ensure specification compliance without requiring extensive iterative redesign. The copied patterns inherit compliance properties from the source regions, reducing correction cycles
Data Source
AI summary
The disclosure provides a method including: identifying a fill-dense region of an integrated circuit (IC) layout having a plurality of fill cells, and a target fill region of the IC layout adjacent to the fill-dense region and free of fill cells; modifying the IC layout by removing a fill cell from the fill-dense region and inserting a duplicate of the removed fill cell within the target fill region to at least partially fill the target fill region; and providing instructions to manufacture an IC using the modified IC layout. The method may reduce a feature density of the fill-dense region to less than an allowable feature density, while adding fill features to otherwise unfillable regions.