IC Layout Hotspot Prediction for CMP Recipe Selection
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Solution Overview
Problem
The existing manufacturing processes for integrated circuits are inefficient in detecting and preventing topology hotspots, which can lead to defects such as recesses or humps during the Chemical Mechanical Polish (CMP) process, causing production yield loss and requiring lengthy defect identification and correction cycles.
Innovation Solution
A method is developed to predict hotspots by generating and using a hotspot library, where images from integrated circuit layouts are cropped, hashed, and grouped to identify patterns, allowing for the selection of optimal CMP recipes to minimize hotspot occurrence, thereby reducing the severity and frequency of defects without physical wafer testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If physical wafer measurement and testing are performed to identify topology defects, then defect detection accuracy is improved, but manufacturing cycle time increases significantly (taking three months)
Solution Approach 1:
The patent applies preliminary action by performing hotspot prediction and CMP recipe optimization during the design and layout phases, before actual wafer fabrication begins. The system analyzes layout data to identify potential hotspots and determines optimal CMP recipes in advance, so that when physical wafers are manufactured, the defects are already prevented or minimized, eliminating the need for lengthy post-manufacturing measurement and correction cycles
Solution Approach 2:
The patent uses copying by creating virtual models and simulations of the CMP process based on layout data. Instead of physically manufacturing wafers to test for hotspots, the system generates virtual representations of the manufacturing process and outcomes, allowing defect prediction and recipe optimization to be performed on digital copies rather than physical specimens, thereby dramatically reducing cycle time while maintaining detection accuracy
2Reliability
If multiple phases including circuit design, layout, manufacturing, and physical measurement are performed sequentially, then comprehensive defect identification is achieved, but production efficiency decreases
Solution Approach 1:
The system performs hotspot prediction and CMP recipe determination during the design and layout phases, before physical manufacturing begins. By completing these critical analysis steps preliminarily using layout data, the system ensures comprehensive defect identification is achieved in advance, allowing physical manufacturing to proceed with optimized parameters that prevent hotspots, thereby maintaining reliability while significantly improving productivity
Solution Approach 2:
The patent introduces an intermediary computational analysis system that processes layout data to predict hotspots and optimize CMP recipes. This intermediary layer acts as a bridge between design and manufacturing, performing comprehensive defect analysis digitally before physical production, thus maintaining thorough defect identification while avoiding the need for sequential physical manufacturing and measurement cycles, thereby improving overall production efficiency
3Manufacturing precision
If optimal CMP recipes are selected based on predicted hotspots, then manufacturing precision is improved, but process complexity increases due to additional prediction and analysis steps
Solution Approach 1:
The patent uses copying by creating virtual models of the CMP process and hotspot formation based on layout data. The system generates digital representations of potential defects and simulates CMP outcomes without requiring complex physical experimentation. This allows optimal CMP recipes to be selected through computational analysis of virtual models, achieving high manufacturing precision while keeping the actual physical process relatively simple and straightforward
Solution Approach 2:
The patent replaces complex physical trial-and-error CMP process optimization with computational algorithms that analyze layout data and predict hotspots. Instead of performing numerous physical experiments to determine optimal CMP recipes, the system uses computer-based analysis to calculate the best parameters directly from design data. This substitution of mechanical/physical optimization processes with computational methods achieves high manufacturing precision while reducing overall process complexity
Data Source
AI summary
A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.