IC Layout Line-End Extensions Mitigate Lithography Corner Rounding
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Solution Overview
Problem
As semiconductor feature sizes shrink, optical effects and processing imperfections during lithography lead to corner rounding and edge errors in integrated circuit fabrication, making it difficult to maintain feature integrity and precision.
Innovation Solution
The introduction of line-end extensions, cross-member shapes, and filler shapes in the layout design helps to mitigate these issues by connecting parallel lines and adding integrity to feature edges, allowing for reduced gap sizes and improved uniformity, which enhances circuit performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithographic masks with standard patterns are used, then manufacturing process is simple, but optical effects cause corner rounding and edge errors reducing feature precision
Solution Approach 1:
The patent applies preliminary action by adding line-end extensions, cross-member shapes, and filler shapes to the layout design before fabrication. These additional geometric features are pre-planned to compensate for anticipated optical effects during lithography, such as corner rounding and edge errors, thereby improving feature precision without changing the manufacturing process itself.
Solution Approach 2:
The patent applies local quality by modifying specific regions of the layout (adding extensions and filler shapes) rather than changing the entire design. These localized geometric adjustments are strategically placed at critical areas prone to optical distortion, allowing precision improvement while minimizing overall layout complexity.
2Productivity
If feature sizes are reduced to increase functional density, then productivity increases, but optical effects and processing imperfections worsen leading to more corner rounding and edge errors
Solution Approach 1:
The patent applies preliminary anti-action by incorporating compensatory geometric features (line-end extensions, cross-member shapes, filler shapes) that counteract the harmful optical effects and processing imperfections. These features are designed to preemptively offset corner rounding and edge errors that become more pronounced at smaller feature sizes, thereby maintaining feature integrity as functional density increases.
3Area of stationary object
If standard layout patterns are used, then manufacturing process is simple, but gap sizes must be larger to accommodate processing variations
Solution Approach 1:
The patent applies the intermediary principle by introducing line-end extensions, cross-member shapes, and filler shapes as mediating geometric features between the main circuit features. These intermediary elements help control and reduce gap sizes by providing buffer zones that account for processing variations, allowing tighter feature spacing without compromising manufacturing reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in greater feature integrity and reduced line-end rounding, leading to improved precision and reliability in integrated circuit fabrication, even at smaller feature sizes.
Implementation Method 1
During a photolithographic exposure, radiation such as ultraviolet light passes through or reflects off the mask before striking a photoresist coating on the substrate. The mask transfers the pattern onto the photoresist
Implementation Method 2
Behaviors of light such as diffraction, fringing, and interference behaviors cause variances such as corner rounding and edge errors
Implementation Method 3
Behaviors of light such as diffraction, fringing, and interference behaviors cause variances such as corner rounding and edge errors
Data Source
AI summary
Various examples of integrated circuit layouts with line-end extensions are disclosed herein. In an example, a method includes receiving an integrated circuit layout that contains: a first and second set of shapes extending in parallel in a first direction, wherein a pitch of the first set of shapes is different from a pitch of the second set of shapes. A cross-member shape is inserted into the integrated circuit layout that extends in a second direction perpendicular to the first direction, and a set of line-end extensions is inserted into the integrated circuit layout that extend from each shape of the first set of shapes and the second set of shapes to the cross-member shape. The integrated circuit layout containing the first set of shapes, the second set of shapes, the cross-member shape, and the set of line-end extensions is provided for fabricating an integrated circuit.