IC Layout Correction with Location Effect Modeling
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Solution Overview
Problem
The challenge in IC design at smaller feature sizes, such as 65 nanometers and below, is the significant impact of uncorrected imaging effects like proximity and location effects on device performance, quality, and reliability, particularly at N28 nodes and below, where feature distortion leads to unacceptable side effects.
Innovation Solution
A method that collectively considers both proximity and location effects during the lithography process by tuning the IC design layout through resizing, reshaping, adding assist features, and using scattering bars, referred to as optical proximity correction (OPC) and location effect correction (LEC), to improve imaging accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If optical proximity correction (OPC) is applied to minimize proximity effect, then imaging resolution is improved, but location-related imaging effects are not effectively corrected
Solution Approach 1:
The patent combines optical proximity correction (OPC) with location effect correction (LEC) into a unified correction framework. The system integrates both proximity effect modeling and location effect modeling to simultaneously address multiple imaging distortions, thereby improving both imaging resolution and device performance reliability.
Solution Approach 2:
The patent applies parameter changes by adjusting design patterns based on both proximity effect parameters and location effect parameters. The correction process modifies geometric parameters of features according to their local environment and absolute position on the wafer, enabling effective correction of imaging distortions that were previously unaddressed.
2Manufacturing precision
If conventional OPC is used to adjust design pattern, then proximity effect is minimized, but location-related imaging factors are not considered
Solution Approach 1:
The patent segments the correction process into distinct components: proximity effect correction and location effect correction. By dividing the overall correction task into manageable segments that can be applied sequentially or simultaneously, the system achieves comprehensive correction without overwhelming computational complexity.
Solution Approach 2:
The patent introduces an intermediary correction model that bridges conventional OPC and the new LEC approach. This intermediary framework allows the integration of location effect considerations while maintaining compatibility with existing OPC workflows, thereby managing complexity during the transition to more accurate correction methods.
3Measurement precision
If design pattern is adjusted for improved imaging, then resolution is enhanced, but location-related distortions cause unacceptable side effects at N28 nodes and below
Solution Approach 1:
The patent applies preliminary anti-action by pre-correcting design patterns for both proximity effects and location effects before lithography fabrication. The system calculates and applies compensation adjustments that counteract anticipated imaging distortions, including location-related effects such as illumination non-uniformity and lens field curvature, thereby preventing feature distortion before it occurs during manufacturing.
Data Source
AI summary
The present disclosure provides one embodiment of an integrated circuit (IC) method. The method includes receiving an IC design layout having a plurality of IC regions each including an IC pattern; performing a dissection process to the IC design layout; and performing a correction process to the IC design layout using a correction model that includes proximity effect and location effect. The correction process includes performing a first correction step to a first IC region of the IC regions, resulting in a first corrected IC pattern in the first IC region; and performing a second correction step to a second IC region of the IC regions, starting with the first corrected IC pattern, resulting in a second corrected IC pattern.