Pattern Matching for IC Layout OPC Complexity
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Solution Overview
Problem
The complexity of optical proximity correction (OPC) in semiconductor manufacturing increases with the number of mask layers and feature size reduction, requiring computationally intensive transformations and analyses that are inefficient with current technologies.
Innovation Solution
The method involves extracting and storing 'situations' from integrated circuit layouts, which are configurations of shapes, to improve OPC by simulating and modifying these situations to meet desired tolerance levels, and reintegrating them into the layout to resolve conflicts and optimize design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional OPC methods are used on modern IC layouts with many mask layers and billions of shapes, then manufacturing precision can be improved, but computational complexity and processing time increase significantly
Solution Approach 1:
The patent segments the IC layout into discrete shapes and groups them by type, creating a hierarchical structure where individual shapes can be processed independently. This segmentation allows the OPC system to handle complex layouts by breaking them into manageable units that can be analyzed and corrected separately, then reassembled into the final corrected layout.
Solution Approach 2:
The patent extracts shape types and their geometric properties from the full IC layout, separating the essential geometric information from the complete design data. This extraction creates a simplified representation that retains the necessary information for OPC while reducing the overall data volume and computational requirements for processing.
2Manufacturing precision
If traditional OPC methods are used on modern IC layouts with many mask layers and billions of shapes, then manufacturing precision can be improved, but processing time increases significantly
Solution Approach 1:
The patent performs preliminary classification of shapes by type and extraction of geometric properties before the main OPC processing. This preliminary action organizes the data in advance, creating structured groups of shapes that can be processed more efficiently during the actual OPC correction phase, thereby reducing overall processing time.
Solution Approach 2:
The patent creates simplified representations or copies of shape types that capture the essential geometric properties needed for OPC. These copied representations can be processed faster than the original full-precision layout data, allowing OPC corrections to be applied more quickly while maintaining the necessary accuracy for manufacturing.
3Manufacturing precision
If GDSII layout files are flattened with optical proximity correction features, then manufacturing precision is improved, but file size increases to over 100 GB
Solution Approach 1:
The patent extracts and stores only the essential geometric properties and shape type information from the full layout, separating the critical OPC data from the complete design information. This extraction reduces the data volume that needs to be stored and processed, while retaining the necessary information for manufacturing precision.
Solution Approach 2:
Instead of storing the complete flattened layout with all OPC features, the patent inverts the approach by storing a simplified representation that can be used to reconstruct or process the layout. This inversion reduces file size while maintaining the ability to perform OPC operations with the required precision.
Data Source
AI summary
Disclosed are methods, systems, and articles of manufacture for using pattern matching with an integrated circuit layout including recognizing shapes within the IC layout, identifying features for the shapes, and extracting situations for the respective features. The method may further include simulating the situations to determine a set of situations for modification based on an OPC requirement, modifying the set of situations to improve satisfaction of the OPC requirement, and reintegrating the modified set of situations into the IC layout. The method may also include simulating a subset of the extracted situations to determine aerial images of the subset, and tiling the subset of situations to form a larger aerial image. The method may also include removing overlap from a window based on the situations extracted for the window, calculating a density for each of the situations, and calculating a density for the window based on the density.