IC Design Layout Proximity Correction via Target Point Movement
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Solution Overview
Problem
The existing optical proximity correction (OPC) techniques in semiconductor IC manufacturing face challenges with unstable convergence due to resolution limitations in lithography, leading to rounding corners and failures in pattern fidelity correction.
Innovation Solution
A method is introduced that involves dissecting IC features into segments, assigning target points, generating a second outer boundary through convolution, and moving these points to achieve a stable convergence in pattern fidelity correction, incorporating proximity correction and photolithography simulation to refine the IC design layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If optical proximity correction is applied using traditional OPC techniques, then pattern fidelity correction is attempted, but unstable convergence occurs due to rounding corners caused by resolution limitations in lithography
Solution Approach 1:
The patent applies preliminary action by pre-processing the design layout to add serif features and adjust target contours before the OPC iteration process. This preliminary modification anticipates the rounding effects of lithography and compensates for them in advance, preventing the unstable convergence that occurs when traditional OPC tries to correct rounded corners during iteration.
Solution Approach 2:
The patent changes parameters by modifying the target contour parameters to account for lithography resolution limitations. Specifically, it adjusts target points and adds serif features to the design layout, changing the geometric parameters before OPC processing to ensure stable convergence and improved pattern fidelity.
2Productivity
If geometry size is scaled down to increase functional density, then production efficiency increases and costs decrease, but lithography resolution limitations cause rounding corners and pattern fidelity failures
Solution Approach 1:
The patent applies preliminary action by pre-processing the design layout to add serif features and adjust target contours before the OPC iteration process. This preliminary modification anticipates the rounding effects of lithography and compensates for them in advance, preventing the unstable convergence that occurs when traditional OPC tries to correct rounded corners during iteration.
Solution Approach 2:
The patent changes parameters by modifying the target contour parameters to account for lithography resolution limitations. Specifically, it adjusts target points and adds serif features to the design layout, changing the geometric parameters before OPC processing to ensure stable convergence and improved pattern fidelity.
3Manufacturing precision
If traditional OPC iteration is performed to achieve convergence between edge positions and target points, then pattern correction is attempted, but rounding corners cause unstable convergence and correction failure
Solution Approach 1:
The patent applies preliminary action by pre-processing the design layout to add serif features and adjust target contours before the OPC iteration process. This preliminary modification anticipates the rounding effects of lithography and compensates for them in advance, preventing the unstable convergence that occurs when traditional OPC tries to correct rounded corners during iteration.
Solution Approach 2:
The patent changes parameters by modifying the target contour parameters to account for lithography resolution limitations. Specifically, it adjusts target points and adds serif features to the design layout, changing the geometric parameters before OPC processing to ensure stable convergence and improved pattern fidelity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures stable convergence and improved pattern fidelity in IC manufacturing by compensating for diffraction and other process effects, enhancing the precision and resolution of IC features.
Implementation Method 1
compensating for diffraction and other process effects
Data Source
AI summary
A method of an integrated circuit (IC) design includes receiving an IC design layout. The IC design layout includes an IC feature with a first outer boundary and a first target points assigned to the first outer boundary. The method also includes generating a second outer boundary for the IC feature and moving all the first target points to the second outer boundary to form a modified IC design layout.