Integrated Circuit Layout for Slim Display Drivers
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Solution Overview
Problem
The challenge is to reduce the size of display drivers in integrated circuit devices while maintaining their functionality and efficiency, particularly in portable devices, where a mere shrinkage using macrofabrication technology leads to mounting difficulties and increased costs due to increased chip area and design inefficiencies.
Innovation Solution
The integrated circuit device is designed with circuit blocks arranged along specific directions, allowing for a slim form factor by optimizing the layout of memory and data driver blocks, including a memory cell array, row address decoder, and sense amplifier block, which reduces the width and length of the chip, enabling efficient signal transmission and minimizing the impact of configuration changes on other blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the chip size is reduced by merely shrinking the integrated circuit device using macrofabrication technology, then the chip size decreases, but it becomes difficult to mount the integrated circuit device
Solution Approach 1:
The patent applies dimensionality change by arranging circuit blocks along the short side direction (first direction) rather than the long side direction, and by orienting the row address decoder and sense amplifier block with their longitudinal directions coinciding with the short side and long side directions respectively. This strategic dimensional arrangement reduces the chip size in the critical mounting dimension while preserving functionality.
2Area of stationary object
If the layout of the circuit block is changed to reduce chip size, then the chip size decreases, but design efficiency decreases and development period increases
Solution Approach 1:
The patent segments the integrated circuit device into distinct functional blocks (memory block, row address decoder, sense amplifier block, data driver block) and assigns specific orientation requirements to each segment. This segmentation allows independent optimization of each block's layout while maintaining overall design efficiency through standardized block interfaces and relationships.
Solution Approach 2:
The patent applies local quality by assigning different orientation characteristics to different circuit blocks based on their functional requirements. The row address decoder is oriented with its longitudinal direction along the short side, while the sense amplifier block is oriented with its longitudinal direction along the long side, allowing each block to be optimized locally for its specific function while contributing to the overall compact design.
Data Source
AI summary
An integrated circuit device, including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include at least one memory block MB which stores image data, and at least one data driver block DB which drives data lines; and the memory block MB includes a memory cell array, a row address decoder RD, and a sense amplifier block SAB. The row address decoder RD is disposed so that a longitudinal direction of the row address decoder RD coincides with the direction D1, and the sense amplifier block SAB is disposed so that a longitudinal direction of the sense amplifier block SAB coincides with the direction D2.