Integrated Circuit Memory Management for Neural Network Calculations

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Solution Overview

Problem

Neural network model calculations require immense memory resources, leading to increased costs and inefficiencies in electronic products due to high memory demands.

Innovation Solution

An integrated circuit configuration that includes a first and second operator engine, random access memory (RAM), and a direct memory access (DMA) engine, with a memory management unit (MMU) table system for efficient memory allocation and access, partitioning tensor memories into unit pages, performing data dependency and life cycle analysis, and allocating virtual and physical buffers to optimize memory usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory resources are increased to support neural network model calculations, then calculation capability is improved, but device cost and complexity increase

Engineering Contradiction:
Improvecalculation capabilityVSAvoidmemory resources
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the neural network calculation process into multiple operator engines (first operator engine, second operator engine, etc.) that can perform calculations in parallel. Each operator engine processes specific operations independently, allowing the system to achieve high calculation capability without requiring a single large memory block. The segmentation also applies to memory management, where different memory regions are allocated to different operator engines based on their specific needs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic memory management through a memory management unit (MMU) that dynamically allocates and deallocates memory resources based on the actual calculation requirements of different operator engines. The MMU maintains mapping tables that are updated in real-time to reflect the current state of memory usage, allowing the system to adapt memory allocation to changing computational demands rather than requiring fixed large memory allocations.

Inventive Principle:
Principle #15Dynamics

2Productivity

If memory resources are increased to support neural network model calculations, then calculation capability is improved, but device cost increases

Engineering Contradiction:
Improvecalculation capabilityVSAvoidmemory capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent creates a universal memory pool that serves multiple operator engines simultaneously. Instead of dedicating separate memory resources to each operator engine, a single memory pool is shared among all operators through the MMU's address translation and allocation mechanisms. This multi-functional memory system allows the same physical memory resources to support calculations for multiple different neural network models and operations, reducing the total memory capacity required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the parameter of memory allocation from fixed to variable. The MMU dynamically adjusts the amount of memory allocated to each operator engine based on the current calculation task's requirements. When one operator engine finishes its computation, its memory resources are released and reallocated to other operators that need them. This parameter change allows the system to achieve high calculation capability with smaller total memory capacity by efficiently reusing memory resources.

Inventive Principle:
Principle #35Parameter changes

3Volume of moving object

If memory resources are limited, then device compactness is improved, but calculation capability deteriorates

Engineering Contradiction:
Improvedevice sizeVSAvoidcalculation capability
Core Design Contradiction:
Volume of moving objectVSProductivity

Solution Approach 1:

The patent ensures continuous utilization of memory resources through the MMU's allocation mechanism. When one operator engine completes its calculation, its memory resources are immediately made available for allocation to the next operator engine that requires them. This continuous reuse of memory resources eliminates idle time and ensures that the limited memory capacity is constantly productive, allowing the compact device to maintain high calculation capability despite small memory size.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary actions by pre-configuring the MMU with mapping tables and allocation strategies before the actual neural network calculations begin. The system prepares the memory management infrastructure in advance, so that when calculations start, the operator engines can immediately access their required memory resources without delay. This preliminary setup allows the compact device to maximize its calculation capability from the outset despite limited memory resources.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11960402B2Integrated circuit and configuration method thereof
Publication Date: 2024.04.16 SIGMASTAR TECH LTD
  • US11960402B2 patent drawing
  • US11960402B2 patent drawing
  • US11960402B2 patent drawing

AI summary

An integrated circuit and a configuration method thereof are disclosed. The integrated circuit, applied to a neural network model calculation, includes a first operator engine, a second operator engine, a random access memory (RAM) and a direct memory access (DMA) engine. The first operator engine is configured to perform a first calculation operation. The second operator engine is configured to perform a second calculation operation. The DMA engine performs an access operation on the RAM according to a first memory management unit (MMU) table when the first operator engine performs the first calculation operation, and performs an access operation on the RAM according to a second MMU table when the second operator engine performs the second calculation operation.