Computing IC Memory Pool Allocation to Cut Lock Contention

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Solution Overview

Problem

Existing memory management methods for computing integrated circuits face performance issues due to mutex locks in single memory pool access and memory waste in thread-specific pools, leading to inefficiencies and resource wastage.

Innovation Solution

A memory management method that dynamically allocates memory using thread-specific pools for smaller requests and mutex-locked shared pools for larger requests, optimizing memory usage and reducing lock contention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a single memory pool is accessed by multiple threads, then memory resource utilization is improved, but lock contention increases and performance deteriorates

Engineering Contradiction:
Improvememory resource utilizationVSAvoidperformance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The memory pool is segmented into multiple memory pools according to different memory sizes. Each thread can access memory pools without contention by selecting the appropriate pool based on memory size requirements, thereby improving both resource utilization and performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different memory pools have different characteristics (size-specific optimization). By matching threads to appropriate memory pools based on their memory size needs, the system provides localized optimization that improves overall performance while maintaining high resource utilization

Inventive Principle:
Principle #3Local quality

2Productivity

If each thread uses its own memory pool, then lock contention is reduced and performance is improved, but memory waste increases

Engineering Contradiction:
ImproveperformanceVSAvoidmemory waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

Each memory pool serves multiple threads that have similar memory size requirements. The memory pools are designed to be shared by multiple threads within the same size category, reducing memory waste while maintaining performance benefits through avoided lock contention

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system changes the parameter of memory pool organization from thread-specific to size-specific. This parameter change allows multiple threads to share memory pools based on their memory size needs, reducing both lock contention and memory waste simultaneously

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4675431A1Memory management method for computing integrated circuit, apparatus and computing integrated circuit
Publication Date: 2026.01.07 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • EP4675431A1 patent drawingFigure 1
  • EP4675431A1 patent drawingFigure 2
  • EP4675431A1 patent drawingFigure 3~5

AI summary

The present application relates to the technical field of artificial intelligence. Disclosed are a memory management method for a computing integrated circuit, an apparatus and a computing integrated circuit. The method comprises: acquiring a memory application request of a current thread; according to the size of an applied memory of the memory application request, determining a target memory allocation mode; if the target memory allocation mode is a first allocation mode, using a thread memory pool of the current thread to allocate to the current thread a memory space corresponding to the memory application request; and if the target memory allocation mode is a second allocation mode, acquiring a mutual exclusion lock of the target memory pool corresponding to the current thread, and using the target memory pool to allocate to the current thread a memory space corresponding to the memory application request. The present application uses a thread memory pool of each thread to process a memory request for a smaller memory without the need of acquiring a mutual exclusion lock, thus improving the memory application and release performance of computing integrated circuits; in addition, only a thread memory pool used by a memory request for a smaller memory is processed, thus reducing the waste of memory resources in computing integrated circuits.