Integrated Circuit Memory Programming Voltage Sequences
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Solution Overview
Problem
Existing integrated circuits with memory systems face inefficiencies in programming and reading operations due to high electrical energy consumption and time requirements, particularly when dealing with twin-bit memory cells that require distinct threshold levels for data storage.
Innovation Solution
The implementation of a control circuit that manages programming lines to apply specific voltage sequences, allowing for the modification and detection of first and second threshold levels in memory cells, optimizing energy usage and programming speed by minimizing voltage differences and maintaining the first programming line at ground potential during operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional programming methods are used to modify threshold levels in memory cells, then data storage capability is achieved, but electrical energy consumption is high and programming time is long
Solution Approach 1:
The patent applies periodic pulsed voltage sequences to programming lines instead of continuous voltage application. The control circuit generates timed pulses with specific amplitudes and durations, allowing threshold level modification through repeated cycles. This periodic action reduces average power consumption while achieving the required programming effect through cumulative threshold shifts over multiple pulses.
Solution Approach 2:
The patent dynamically adjusts voltage parameters (amplitude, duration, sequence) based on the current state of memory cells and desired threshold levels. The control circuit modifies programming pulse characteristics in real-time, changing voltage magnitudes and timing parameters to optimize both programming speed and energy efficiency. Different voltage sequences are applied depending on whether programming or reading operations are being performed.
2Productivity
If voltage sequences are applied to modify threshold levels, then data storage is achieved, but capacitive and inductive effects slow down operation
Solution Approach 1:
The control circuit prepares voltage sequences in advance and pre-charges programming lines before actual threshold modification begins. By anticipating required voltage transitions and pre-positioning charge on capacitive elements, the circuit minimizes delay caused by capacitive charging during critical programming operations. This preliminary action reduces the time penalty associated with capacitive effects in the memory cell structure.
3Adaptability or versatility
If the first programming line is raised from ground potential during operations, then flexibility in voltage application is improved, but capacitive effects increase and slow down programming
Solution Approach 1:
The patent maintains the first programming line at ground potential during critical programming and reading operations to minimize voltage differences across capacitive elements. By keeping one programming line grounded, the circuit reduces capacitive coupling effects and associated delays. This equipotential approach for the first programming line during operations optimizes programming speed while the control circuit achieves necessary voltage flexibility through the second programming line and control gate voltage adjustments.
Data Source
AI summary
Embodiments of the present invention relate to a method to operate an integrated circuit that includes a memory. The memory encompasses a first and a second threshold level. The invention further relates to integrated circuits including a memory with a first and a second threshold level and a method to determine an operating point of an integrated circuit.