IC Module Coil Layout for Impedance Matching in Compact Cards
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Solution Overview
Problem
In IC modules, the decrease in fixing strength between the module substrate and the IC chip due to the IC chip being mounted on the connection coil, combined with the need for downsizing and the use of low capacitance IC chips, leads to challenges in increasing the impedance and inductance of the connection coil.
Innovation Solution
The IC module design includes a rectangular substrate with a spiral connection coil, an outermost connection terminal portion with a through-hole, and a land portion, positioned to enhance impedance, along with specific coil width and terminal configurations to support impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the IC chip is mounted on the substrate in a state of being located on the connection coil, then the fixing strength between the module substrate and the IC chip decreases, but mounting the IC chip closer to the connection coil would reduce the distance and improve space utilization
Solution Approach 1:
The connection terminal is divided into multiple terminal portions (first through sixth terminal portions) arranged in a specific pattern on the substrate. This segmentation allows the IC chip to be mounted at a distance from the connection coil while maintaining proper electrical connections and fixing strength through the distributed terminal structure.
Solution Approach 2:
The six terminal portions are arranged asymmetrically on the substrate with specific positional relationships. The first and second terminal portions are disposed on a first side of the IC chip, the third and fourth terminal portions on a second side, creating an asymmetric layout that optimizes both fixing strength and electrical connection while maintaining the required distance from the connection coil.
2Ease of manufacture
If the module substrate is downsized to reduce cost, then the number of turns of the connection coil decreases, but downsizing the substrate reduces the available area for the connection coil
Solution Approach 1:
The connection coil is designed to extend in both the first direction (length) and second direction (width) of the rectangular substrate, utilizing two-dimensional space efficiently. This allows the connection coil to achieve sufficient number of turns within the downsized substrate area, maintaining inductance and impedance characteristics while reducing overall module size and cost.
3Quantity of substance
If the width of the connection coil is reduced to increase the number of turns, then the inductance increases, but the connection coil may break
Solution Approach 1:
The connection coil width is optimized to a specific range (50 μm to 100 μm) that balances the need for sufficient number of turns with the mechanical strength requirement. This parameter optimization allows the coil to maintain adequate inductance and impedance while preventing breakage during manufacturing and operation.
4Quantity of substance
If the interval between the turns of the connection coil is reduced to increase the number of turns, then the inductance increases, but the turn portions may short-circuit with each other
Solution Approach 1:
The interval between turns of the connection coil is optimized to a specific range (20 μm to 50 μm) that allows sufficient number of turns to be packed within the substrate area while maintaining reliable electrical isolation between adjacent turns. This prevents short-circuits while achieving the required inductance and impedance values.
5Ease of manufacture
If low capacitance IC chips are used to reduce cost, then the impedance matching with the connection coil becomes difficult, but using low capacitance chips reduces overall system cost
Solution Approach 1:
The connection coil parameters (width, interval between turns, number of turns) are precisely optimized to achieve impedance values that match with low capacitance IC chips. The coil width is set to 50-100 μm and the turn interval to 20-50 μm, creating an impedance profile that is compatible with modern low-capacitance chips, thereby enabling cost-effective designs without compromising impedance matching.
Solution Approach 2:
The terminal portions are configured with specific geometric patterns and dimensions that replicate optimal impedance matching characteristics. The asymmetric arrangement and spacing of the six terminal portions create an effective impedance transformation that compensates for the low capacitance of modern IC chips, achieving proper matching without requiring expensive high-capacitance alternatives.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances the impedance of the connection coil, addressing the challenges of reduced fixing strength and impedance matching, while maintaining module substrate downsizing and accommodating low capacitance IC chips.
Implementation Method 1
an antenna sheet including a coupling coil electromagnetically coupling with the connection coil in a contactless manner, and an antenna coil communicating with an external terminal in a contactless manner
Data Source
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AI summary
An IC module according to the present invention includes a rectangular substrate having long sides extending in a first direction; a connection coil formed in a spiral shape on a first surface of the substrate; an outermost connection terminal portion formed at an outermost end of the connection coil; and an IC chip provided on a portion of the first surface on an inner peripheral side relative to the connection coil, wherein the outermost connection terminal portion includes an outermost through-hole portion penetrating the substrate in a thickness direction of the substrate, and an outermost land portion surrounding the outermost through-hole portion and connecting between the outermost through-hole portion and the connection coil; and as viewed in a second direction perpendicular to both the first direction and the thickness direction, the outermost connection terminal portion is disposed on a first side in the first direction relative to the IC chip.