Module Swapping in IC Design Verification

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Solution Overview

Problem

The existing process of replacing logic descriptions in RTL data structures with simulation models is manual and time-consuming, leading to inefficiencies and synchronization issues between design and simulation processes in integrated circuit design verification.

Innovation Solution

A system that uses an integrated circuit generator to programmatically select and replace instances of module descriptions with simulation models, facilitated by a control interface and compiler annotations, allowing for efficient testing and keeping design and simulation processes in sync.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual replacement of logic descriptions with simulation models is performed, then verification accuracy is improved, but time consumption and process complexity increase

Engineering Contradiction:
Improveverification accuracyVSAvoidtime consumption
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system enables automated identification and replacement of logic descriptions with simulation models through compiler annotations and control interfaces, allowing the verification process to self-manage the substitution without manual intervention, thereby reducing time consumption while maintaining verification accuracy

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system performs preliminary identification and marking of target logic descriptions using compiler annotations before the actual simulation replacement occurs, preparing the design in advance to enable efficient automated substitution during verification without time-consuming manual analysis

Inventive Principle:
Principle #10Preliminary action

2Reliability

If manual replacement of logic descriptions is performed, then simulation model integration is achieved, but synchronization between design and simulation processes deteriorates

Engineering Contradiction:
Improvesimulation model integrationVSAvoidsynchronization between design and simulation
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The system establishes feedback mechanisms where the control interface continuously monitors and tracks the state of logic description replacements, ensuring that simulation models remain synchronized with the current design version by detecting and responding to any desynchronization conditions

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The control interface acts as an intermediary between the design process and simulation process, managing the replacement of logic descriptions with simulation models while maintaining synchronization by coordinating changes across both processes and preventing mismatches

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If automated module swapping is implemented, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvetesting efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments the complex automated module swapping process into distinct functional components: compiler annotations for identification, control interface for coordination, and simulation model integration, making the overall complex system manageable through modular organization of its parts

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240403526A1Integrated circuit design verification with module swapping
Publication Date: 2024.12.05 SIFIVE INC
  • US20240403526A1 patent drawing
  • US20240403526A1 patent drawing
  • US20240403526A1 patent drawing

AI summary

An integrated circuit design may be generated for an integrated circuit. The integrated circuit design may include an instance of a module description that describes a functional operation of a module. The instance may include an input and an output. The integrated circuit design may be encoded in an intermediate representation (IR) data structure. Parameters may be received indicating that the instance should be replaced with a simulation model. The parameters may include a first parameter pointing to the instance and a second parameter pointing to the simulation model.