IC Module Testing Without Common Sampling Window
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Solution Overview
Problem
Conventional testing methods for integrated circuit modules comprising multiple devices often fail to accurately determine the data valid windows for each device, leading to incorrect identification of common sampling windows and potential rejection of modules that meet specification requirements when devices operate independently with their own clock signals.
Innovation Solution
A method that generates and transmits test vector patterns along with a first clock signal and multiple second clock signals with varying phases to identify data valid windows for each integrated circuit device within an integrated circuit module, allowing for independent operation and eliminating the need for a common sampling window verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional testing methods use a common sampling window for all devices in an integrated circuit module, then the testing process is simplified, but devices that operate independently with their own clock signals are incorrectly rejected even when they meet specification requirements
Solution Approach 1:
The patent segments the testing approach by device rather than by module. Each integrated circuit device is tested independently with its own data valid window identification, rather than forcing all devices to conform to a single common sampling window. This segmentation allows independently operating devices to pass testing when they meet their individual specifications.
Solution Approach 2:
The patent inverts the conventional testing logic by not requiring devices to conform to a common window, but rather by having the testing system adapt to each device's actual operating characteristics. Instead of making devices conform to a standard, the standard is made to conform to each device's independent operation.
2Device complexity
If conventional testing methods assume all devices share a common clock signal, then the testing methodology is simplified, but accuracy in determining data valid windows is reduced when devices operate with independent clock signals
Solution Approach 1:
The patent introduces dynamic adaptation in the testing methodology. The testing system dynamically adjusts to each device's actual clock signal characteristics and identifies data valid windows based on real device behavior rather than assuming a static common clock. This dynamic approach maintains accuracy while accommodating independent device operation.
Solution Approach 2:
The patent changes the testing parameters from a fixed common sampling window to device-specific data valid windows. By changing the fundamental parameter of how sampling windows are defined, the system achieves accurate measurement for independently operating devices without requiring complex additional hardware.
3Reliability
If conventional testing requires verification of a common sampling window for the entire module, then module-level consistency is ensured, but the yield of good modules is reduced by rejecting modules with independently operating devices
Solution Approach 1:
The patent segments the consistency verification from module-level to device-level. Instead of requiring all devices to demonstrate consistency within a common window, each device independently demonstrates consistency within its own data valid window. This segmentation maintains reliability for each device while eliminating false rejections at the module level.
Solution Approach 2:
The patent creates a separate testing path for each device that mirrors the conventional testing process but operates independently. Each device has its own copy of the testing methodology adapted to its specific characteristics, allowing good devices to pass without being dragged down by the limitations of a common module-level window.
Data Source
AI summary
A system and method for testing an integrated circuit module including multiple integrated circuit devices that provide a data strobe signal associated with at least one data signal provided by the same integrated circuit device. A determination of a test outcome for the integrated circuit module may be made after identifying data valid windows for each integrated circuit device, without having to both identify a common sampling window defined by an intersection of the identified data valid windows and verify that such common sampling window meets specification requirements.