Direct Netlist Modification for IC Design Iteration

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Solution Overview

Problem

Conventional IC design systems require significant time and effort for incremental design changes, as they necessitate updating layout views and re-running parasitic extraction and simulation tools, which hampers productivity and runtime performance.

Innovation Solution

A method to directly modify netlists for IC designs, allowing changes to be implemented using batch processing, eliminating the need for intermediate layout updates and enabling immediate verification with noise, timing, and power tools.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional IC design systems are used to implement design changes through layout updates and parasitic extraction, then design accuracy is maintained, but design time and processing time increase significantly

Engineering Contradiction:
Improvedesign accuracyVSAvoiddesign time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent extracts and modifies only the specific device parameters directly from the netlist without requiring full layout regeneration or complete parasitic extraction. This selective extraction approach maintains design accuracy for modified devices while avoiding the time-consuming process of re-processing the entire design.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary parameter extraction and stores device characteristics in advance within the netlist structure. When design changes are needed, only the specific modified parameters are updated rather than re-extracting all device parameters, significantly reducing the time required for design iterations while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If conventional IC design systems are used to implement design changes through layout updates and parasitic extraction, then design reliability is maintained, but runtime performance deteriorates

Engineering Contradiction:
Improvedesign reliabilityVSAvoidruntime performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent creates and modifies netlist representations that copy essential device parameters and connections. These netlist models serve as reliable substitutes for full layout representations, enabling rapid simulation and analysis without requiring access to the complete layout geometry, thus maintaining design reliability while improving runtime performance.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent enables direct modification of device parameters within the netlist structure. By changing parameters such as device dimensions, materials, or connections directly in the netlist without regenerating from layout, the system maintains parameter accuracy for reliable simulation while dramatically reducing processing time and improving runtime performance.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If conventional IC design systems are used to implement design changes, then design completeness is maintained, but device complexity increases

Engineering Contradiction:
Improvedesign completenessVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the design modification process into independent netlist parameter updates rather than requiring full layout regeneration. Each device parameter can be modified independently in the netlist, allowing designers to make targeted changes without affecting unrelated parts of the design, thus maintaining completeness while reducing process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal netlist-based modification approach that can handle various types of design changes (device parameters, connections, configurations) through a single unified process. This multi-functional approach replaces multiple specialized layout editing and extraction processes, maintaining design completeness while simplifying the overall modification workflow.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250013811A1Modifying netlists for device changes in IC designs
Publication Date: 2025.01.09 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250013811A1 patent drawing
  • US20250013811A1 patent drawing
  • US20250013811A1 patent drawing

AI summary

Embodiments of the present disclosure provide systems and methods for efficiently performing device changes directly in an extracted netlist, without requiring independent changes in a schematic design or layout view of the IC design. A disclosed method accesses a netlist for a selected device in a given integrated circuit (IC) design; and identifies a change to be made in the netlist. The system performs, based on the selected change to the netlist, at least one of changing one or multiple parameters of the selected device; adding a second selected device; removing the selected device, or changing an interconnect. The system can implement changes to the netlist using batch processing.