Automated IC Netlist Hardening for Radiation Environments

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Solution Overview

Problem

Current electronic design automation (EDA) tools do not effectively account for extreme environmental conditions such as high temperatures and radiation, leading to inefficiencies and errors in hardening integrated circuits (ICs) for reliability in challenging environments, particularly in space applications.

Innovation Solution

An IC design enhancing tool automatically scans and replaces non-compliant components in the IC netlist with environmentally hardened alternatives, using predefined criteria for single event transient, single event upset, and electromigration effects, iteratively ensuring compliance through collaboration with EDA tools.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual inspection of RTL code is used to verify component compliance, then designers can identify environmental hardening issues, but the process becomes time-consuming and inefficient

Engineering Contradiction:
ImproveIC reliability in extreme environmentsVSAvoiddesign verification time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces manual mechanical inspection of RTL code with an automated electronic design automation (EDA) tool that systematically analyzes the netlist and identifies components requiring environmental hardening. This substitution eliminates the time-consuming manual process while maintaining comprehensive verification of all components against environmental criteria.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If designers manually write RTL code to choose correct components, then compliance with environmental hardening criteria can be achieved, but the approach does not work with technology independent code and becomes impossible for large complex designs

Engineering Contradiction:
Improveenvironmental hardening complianceVSAvoiddesign complexity management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces manual component selection and RTL code writing with an automated EDA tool that processes technology-independent netlists. The tool automatically identifies components requiring hardening and generates updated netlists, making the process scalable to large complex designs while maintaining compliance with environmental hardening criteria.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The EDA tool is designed to work with technology-independent code and various netlist formats, providing universal applicability across different design technologies and tools. This multi-functionality allows the same automated process to handle diverse IC designs without requiring manual intervention or code rewriting.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If existing EDA tools are used without environmental hardening checks, then design productivity is maintained, but ICs are not hardened against environmental effects

Engineering Contradiction:
Improvedesign efficiencyVSAvoidIC performance in extreme environments
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent merges environmental hardening verification functionality into the existing EDA tool workflow. The tool automatically performs hardening checks during the normal design process, combining productivity-maintaining EDA operations with reliability-enhancing environmental verification in a single integrated process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The EDA tool performs environmental hardening verification during the design phase before fabrication, identifying and flagging components that require hardening. This preliminary action prevents reliability issues from arising in the first place, rather than requiring post-fabrication modifications or testing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10990727B1Method for radiation hardening of integrated circuits
Publication Date: 2021.04.27 BAE SYSTEMS INFORMATION ANDELECTRONIC SYSTEMS INTEGRATION INC
  • US10990727B1 patent drawing
  • US10990727B1 patent drawing
  • US10990727B1 patent drawing

AI summary

An IC design enhancing tool for automatically reviewing and environmentally hardening an IC design layout. The IC design enhancing tool may be realized, for example, in software that scans through an IC netlist generated by an electronic design automation (EDA) tool and replaces components that are not compliant with one or more hardening criteria. The newly created netlist can then be re-checked by the EDA tool and an iterative process takes place between the EDA tool and the IC design enhancing tool until the final design layout is fully compliant for a given environment. Interrogation of the IC design layout involves determining if at least a portion of the hardware layout netlist meets one or more predetermined hardening criteria. If it does not, then one or more of the hardware components are replaced using one or more predefined hardened components.