IC Output Circuitry Autonomous Signal Retention
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Solution Overview
Problem
Existing integrated circuits face complexity and control overhead when maintaining output signals across power domains that are being powered down, as they require centralized coordination and timing for latch cells to store output signals before power-down.
Innovation Solution
The integration of voltage sensing circuitry and a mode signal store allows output circuitry to autonomously maintain output signals by monitoring the core power supply voltage and switching to a self-maintaining state when preselected, reducing control overhead and enabling signal retention independently of core circuitry power status.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If latch cells are used to maintain output signals during power-down, then signal retention is achieved, but control complexity and coordination overhead increase
Solution Approach 1:
The output circuitry is designed to autonomously detect power-down conditions through voltage sensing circuitry and automatically maintain output signals without requiring external control commands. The circuit self-activates retention mode when it detects that the core power supply voltage falls below the threshold, eliminating the need for centralized controller coordination.
Solution Approach 2:
Voltage sensing circuitry continuously monitors the core power supply voltage and provides feedback to the output circuitry. When the voltage drops below a predetermined threshold, the sensing circuitry triggers the output circuitry to switch into signal maintenance mode, creating a closed-loop control system that automatically responds to power conditions.
2Reliability
If centralized control coordinates latch cells before power-down, then signal maintenance is ensured, but control overhead and timing requirements increase
Solution Approach 1:
The output circuitry is pre-configured with voltage sensing circuitry and retention logic that are always ready to activate. When power-down occurs, the circuit automatically detects the voltage drop and immediately begins maintaining output signals without requiring preliminary control commands or timing coordination from external controllers.
Solution Approach 2:
The system eliminates the need for external control timing by making the output circuitry self-responsive to power conditions. The voltage sensing circuitry automatically detects power-down events and triggers signal retention independently, removing all timing constraints and coordination requirements with centralized controllers.
3Device complexity
If output circuitry remains dependent on core signal, then circuit operation is simple, but signal retention during power-down fails
Solution Approach 1:
The output circuitry is designed with dynamic operational modes that can switch based on power conditions. In normal operation mode, the circuit operates simply and dependently on core signals. When voltage sensing detects power-down, the circuit dynamically transitions to an autonomous retention mode where it independently maintains output signals without core signal input.
Solution Approach 2:
The output circuitry is designed to perform multiple functions: normal signal processing when powered and signal retention when core power is removed. The same circuit hardware executes both dependent operation and independent signal maintenance, eliminating the need for separate dedicated retention circuitry while achieving both simplicity and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the control process during power-down and power-up, reduces the likelihood of undesired output effects, and enhances design reusability by allowing adaptive voltage sensing and shared circuitry, leading to more reliable signal maintenance and reduced complexity.
Implementation Method 1
voltage sensing circuitry coupled to said core power supply circuitry and responsive to sensing of said core power supply voltage falling below a threshold level to assert a voltage-low signal
Data Source
AI summary
An integrated circuit is provided with a power domain which can be selectively powered-up or powered-down. An output circuitry serving to buffer a signal generated by the core circuitry within such a power domain has its own output power supply voltage. An adaptive voltage sensing circuit senses when the core power supply voltage to the core circuitry falls below a threshold level and generates a voltage-low signal. If output signal retention has been preselected to be active for the output signal concerned, then the output circuitry responds to the voltage-low signal by maintaining the output signal state (output signal driven low, output signal driven high or output signal in a high impedance drive state). The retention mode is preselected by a pulse with its value stored within a mode latch indicating whether or not retention is required. Thus, when the adapted voltage sensing circuitry itself senses the voltage level for the core circuitry falling below the threshold, it activates the retention operation.