IC Layer Overlap Prediction for Via Resistance and Misalignment

Solution Overview

Problem

The increasing compactness of contacts and interconnects in integrated circuit (IC) designs leads to significant resistance and alignment issues, particularly at advanced process nodes, affecting RC delay, timing, and reliability, which existing design rules struggle to address effectively.

Innovation Solution

A method utilizing a machine-trained neural network to predict and display the minimum overlap shapes of semiconductor layer interfaces, accounting for process variations and misalignments, allowing designers to optimize layouts for reduced resistance and improved reliability through interactive design updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If interconnect dimensions are scaled down to match shrinking transistor sizes, then device integration density is improved, but resistance and RC delay increase significantly

Engineering Contradiction:

Improveinterconnect areaVSAvoidRC delay

Core Design Contradiction:

Area of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by computing predicted manufactured contours and minimum overlap shapes during the design phase using machine learning models. This allows designers to identify and correct potential resistance and alignment issues before fabrication, preventing RC delay problems rather than addressing them after scaling has already increased resistance.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces traditional mechanical measurement and alignment verification methods with machine learning-based prediction systems. The ML models predict manufactured contours and overlap shapes computationally, substituting physical measurement processes with algorithmic prediction to achieve faster, more accurate resistance optimization.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If overlay accuracy is increased to maintain precise layer alignment, then manufacturing precision is improved, but design complexity and rule constraints increase

Engineering Contradiction:

Improveoverlay accuracyVSAvoiddesign rule complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling the design system to automatically compute predicted manufactured contours and minimum overlap shapes without requiring manual intervention for each alignment check. The machine learning models autonomously predict alignment outcomes and provide design guidance, reducing the burden on designers while maintaining high overlay accuracy.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent changes parameters by using machine learning models to predict continuous contour shapes and overlap areas instead of relying on discrete design rule checks. This continuous parameter approach allows for more nuanced optimization of layer alignment and overlap, reducing the need for complex binary design rules while maintaining manufacturing precision.

Inventive Principle:

Principle #35Parameter changes

3Area of moving object

If contact and via dimensions are reduced to increase integration density, then area efficiency is improved, but contact resistance increases

Engineering Contradiction:

Improvecontact areaVSAvoidcontact resistance

Core Design Contradiction:

Area of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by computing predicted manufactured contours and minimum overlap shapes during the design phase using machine learning models. This allows designers to identify and correct potential resistance and alignment issues before fabrication, preventing RC delay problems rather than addressing them after scaling has already increased resistance.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces traditional mechanical measurement and alignment verification methods with machine learning-based prediction systems. The ML models predict manufactured contours and overlap shapes computationally, substituting physical measurement processes with algorithmic prediction to achieve faster, more accurate resistance optimization.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12547804B2Computing and displaying a predicted overlap shape in an IC design based on predicted manufacturing contours

Publication Date: 2026.02.10 D2S INC

AI summary

Some embodiments provide a method for computing and displaying of minimum overlap for semiconductor layer interfaces, such as metal-via and metal-contact. The method leverages a machine-trained network (e.g., a trained neural network) to quickly, but accurately, infer the contours for the manufactured shapes across a range of process variations. The method also models the semiconductor process manufacturing layer-to-layer misalignment. The combined set of information (from the machine-trained network and from the modeling) is used by the method to compute the minimum overlap shapes at multiple layer interfaces. The method in some embodiments then uses the minimum overlap shapes to obtain an accurate calculation of the via or contact resistance.