Integrated Circuit Package 3D Stacking Footprint Reduction
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Solution Overview
Problem
Integrated circuit packages have a large footprint due to the need for mounting additional discrete components like quartz crystals and surface acoustic wave filters on printed circuit boards, which is not fully addressed by existing methods such as through-silicon-vias stacking.
Innovation Solution
The solution involves mounting additional passive components on the front or backside of a host integrated circuit using conductive traces and redistribution layers, which are connected to the integrated circuit's contact pads, allowing for a three-dimensional structure that reduces the overall footprint and improves component matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If additional discrete components are mounted on a printed circuit board, then the device can include necessary passive components, but the footprint of the device becomes large
Solution Approach 1:
The patent transitions from a two-dimensional PCB layout to a three-dimensional structure by stacking multiple integrated circuit chips vertically. Through-silicon vias (TSVs) enable conductive pathways through the stacked chips, allowing electrical connections between layers. This vertical stacking arrangement integrates multiple discrete components into a compact 3D package, dramatically reducing the horizontal footprint while maintaining all necessary component functions.
2Adaptability or versatility
If discrete components are mounted on the PCB, then the device includes necessary passive components, but the overall footprint is substantially contributed to by these components
Solution Approach 1:
The patent merges multiple discrete passive components (resistors, capacitors, inductors, quartz crystals, SAW filters) that were traditionally mounted separately on a PCB into a single integrated stacked chip package. These components are fabricated on separate chip layers and interconnected through TSVs, creating a unified compact assembly that provides the same functional versatility as the distributed PCB layout but with dramatically reduced footprint.
3Area of stationary object
If through-silicon-vias are used to stack identical chips, then the footprint is reduced, but additional discrete components still need to be mounted on the PCB
Solution Approach 1:
The patent creates a universal stacked chip package platform that can accommodate various types of discrete passive components (resistors, capacitors, inductors, quartz crystals, SAW filters, etc.) within the same vertical structure. Different chip layers are designed with specific component functions, and the TSV interconnection system provides universal electrical access to all components regardless of their vertical position, enabling complete component integration in a single package without requiring additional PCB mounting.
Data Source
AI summary
An integrated circuit package has a host integrated circuit with an active front side that is surface-mounted on a support and an inactive backside. Conductive pathways extend between the front and back sides of the integrated circuit. A redistribution layer on the back side of the host integrated circuit provides conductive traces and contact pads. The traces of the redistribution layer establish connection between the conductive pathways and the contact pads. At least one additional component is surface-mounted on the back side of the host integrated circuit by electrical connection to the contact pads of the redistribution layer to provide a compact three-dimensional structure. In an alternative embodiment, the additional components can be mounted on the active side.