IC Package Cap Assembly for Heat Dissipation and Delamination Control
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Solution Overview
Problem
Existing integrated circuit packages face challenges in heat dissipation management due to miniaturization, necessitating improved thermal performance and heat dissipation mechanisms.
Innovation Solution
A method involving the use of a heat dissipation layer with an adhesive or solderable element positioned next to the heat dissipation layer, which acts as a wedge between the chip and the cap, ensuring uniformity and adhesion, and includes a B-stage polymer material for enhanced adhesion and mechanical strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a thermal interface material layer is deposited on the chip surface, then heat dissipation is improved, but the bonding between cap and chip may be compromised due to material incompatibility or delamination
Solution Approach 1:
The patent introduces an intermediary layer between the thermal interface material and the cap/chip bonding interface. This intermediary layer acts as a mediator that is compatible with both the thermal interface material and the bonding process, preventing direct contact between incompatible materials. The intermediary layer ensures that heat dissipation functionality is maintained while bonding reliability is preserved by eliminating material incompatibility issues at the bonding interface.
Solution Approach 2:
The patent segments the bonding interface into distinct functional zones: a thermal interface material layer for heat dissipation and a separate bonding interface region for cap attachment. By spatially separating these functions and using an intermediary layer at the boundary, the patent allows each layer to optimize its specific function without compromising the other, thus resolving the contradiction between heat dissipation and bonding strength.
2Ease of manufacture
If the cap is bonded directly to the chip over the heat dissipation layer, then assembly is simplified, but delamination may occur due to stress concentration or adhesion failure
Solution Approach 1:
The intermediary layer serves as a mediator between the cap and the chip, distributed across the bonding interface to prevent direct bonding over the thermal interface material. This intermediary layer distributes mechanical stresses uniformly across the bonding area, preventing stress concentration that would lead to delamination. The assembly remains simple as the intermediary layer is applied as a continuous layer, while adhesion strength is significantly improved.
3Volume of moving object
If miniaturization is pursued to reduce package size, then device density is improved, but heat dissipation management becomes more critical and difficult
Solution Approach 1:
The patent employs a thin-film intermediary layer that provides full bonding surface coverage despite the miniaturized package size. This thin film approach allows the bonding interface to extend across the entire cap-chip interface area, maximizing bonding strength while maintaining the compact form factor. The thin film nature ensures minimal added thickness, preserving the miniaturized dimensions while effectively managing heat dissipation through the thermal interface material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved heat dissipation and mechanical strength, preventing delamination and ensuring better thermal conductivity and mechanical integrity of the package.
Implementation Method 1
a heat dissipation layer made of a thermal interface material on the second surface of the chip
Implementation Method 2
during step d), the B-stage polymer material is deposited and then pre-polymerized, and, during step c) or after step c), the B-stage material is polymerized
Implementation Method 3
the element being ultrasonically soldered to one of the cap or of the second surface of the chip during step d) and to the other one of the cap or of the second surface of the chip during step c) or after step c)
Data Source
AI summary
A chip is assembled on an interconnection substrate. A heat dissipation layer made of a thermal interface material is deposited on the chip. A cap is bonded to the substrate with the cap covering the chip and the heat dissipation layer contacting with the cap. An element made of an adhesive material or a solderable material is formed on the chip prior to depositing the heat dissipation layer, or formed on the cap prior to bonding the cap. The element is thus in contact with the cap and with the chip and positioned next to the heat dissipation layer.