IC Package Cavity Design for Height Reduction

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Solution Overview

Problem

Conventional integrated circuit package systems face challenges in miniaturization, yield, and reliability due to large size and space requirements, particularly in portable devices, and have not provided effective solutions for low-cost manufacturing and improved efficiency.

Innovation Solution

An integrated circuit package system is designed with a carrier having a first and second side, where an integrated circuit is mounted on the first side, an external interconnect is attached to the second side, and an encapsulation is formed around the circuit and interconnect, exposing the interconnect and creating a cavity, which allows for embedded external interconnects that provide structural support and reduce package height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional molding approaches are used to encapsulate integrated circuits, then protection and encapsulation are achieved, but package height and space requirements increase

Engineering Contradiction:
Improveencapsulation protectionVSAvoidpackage height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent embeds the external interconnect within the encapsulation material itself, nesting the interconnect structure inside the molded compound rather than placing it externally. This nesting approach allows the interconnect to be surrounded by protective material while maintaining a compact overall package height, resolving the contradiction between encapsulation protection and package dimension constraints.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from conventional external interconnect placement to embedded interconnect positioning within the encapsulation volume. By utilizing the third dimension (depth within the mold compound) for interconnect placement rather than only external surface mounting, the design achieves both protective encapsulation and reduced external package height.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If package level stacking or package on package designs are used, then packaging density increases, but height and space requirements increase

Engineering Contradiction:
Improvepackaging densityVSAvoidpackage height
Core Design Contradiction:
ProductivityVSLength of stationary object

Solution Approach 1:

The patent utilizes the vertical dimension within the encapsulation material to embed external interconnects, enabling three-dimensional integration without increasing external package height. This approach allows multiple interconnect layers to be stacked within the encapsulation volume, increasing packaging density while maintaining compact external dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If external interconnects are fully exposed, then connectivity is achieved, but structural support and reliability are reduced

Engineering Contradiction:
ImproveconnectivityVSAvoidstructural support
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent nests the external interconnect within the encapsulation material, surrounding the interconnect with protective mold compound while leaving necessary portions exposed for electrical connection. This nested configuration provides both structural support through the encapsulation material and maintained connectivity through controlled exposure, resolving the contradiction between structural integrity and electrical accessibility.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS8823160B2Integrated circuit package system having cavity
Publication Date: 2014.09.02 STATS CHIPPAC MANAGEMENT PTE LTD
  • US8823160B2 patent drawing
  • US8823160B2 patent drawing
  • US8823160B2 patent drawing

AI summary

An integrated circuit package system includes providing a carrier having a first side and a second side; mounting an integrated circuit over the carrier with the first side facing the integrated circuit; attaching an external interconnect to the second side; and forming an encapsulation over the integrated circuit and around the external interconnect with the external interconnect exposed from the encapsulation and with the encapsulation and the second side forming a cavity.