IC Package Dual-Surface Contact Structures for Signal Routing
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Solution Overview
Problem
Current integrated circuit (IC) packaging technologies face limitations in efficiently routing high-speed signals and minimizing signal attenuation, as they rely heavily on printed circuit boards (PCBs) which have restricted maximum routing lengths due to attenuation and require expensive fabrication technologies.
Innovation Solution
The IC package design features a package substrate with both first and second surfaces of contact structures, where the first surface connects to PCB traces and the second surface connects to independent devices via connective structures like twin-axial cables or package bridges, allowing for higher-speed signal routing with reduced attenuation and potentially using less expensive PCB materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-speed signals are routed through PCB traces, then signal transmission is achieved, but signal attenuation increases and maximum routing length is limited
Solution Approach 1:
The patent introduces a vertical dimension by stacking multiple PCB layers and using through-hole vias to create three-dimensional signal routing paths. This allows signals to travel through the thickness of the PCB rather than being constrained to single-plane traces, effectively increasing the usable routing length while maintaining signal integrity through controlled impedance via structures.
Solution Approach 2:
The patent uses termination resistors and impedance-matching components as intermediaries at signal transmission endpoints and junctions. These components act as mediators that absorb signal reflections and match impedance between different trace segments, thereby reducing signal attenuation and enabling longer routing lengths without compromising transmission quality.
2Reliability
If expensive fabrication technologies are used to minimize signal attenuation, then signal transmission quality improves, but manufacturing cost increases
Solution Approach 1:
The patent optimizes standard PCB fabrication parameters such as trace width, trace spacing, copper weight, and dielectric thickness to achieve desired impedance values (e.g., 50 ohms, 100 ohms differential). By carefully controlling these parameters within normal fabrication capabilities, the patent achieves low signal attenuation without requiring expensive specialized fabrication processes.
Solution Approach 2:
The patent applies different trace geometries and impedance control measures only in critical signal routing regions where high-speed signals traverse, rather than applying expensive fabrication techniques uniformly across the entire PCB. Standard routing areas use conventional designs, thereby reducing overall manufacturing cost while maintaining signal quality where needed.
3Adaptability or versatility
If PCB routing length is extended to achieve longer connections, then connectivity flexibility improves, but signal attenuation increases
Solution Approach 1:
The patent utilizes multi-layer PCB construction with through-hole vias to create vertical signal paths. This three-dimensional routing approach allows signals to reach distant components without extending trace lengths on individual layers, thereby maintaining signal integrity while achieving the necessary connectivity flexibility across large PCB areas.
Solution Approach 2:
The patent divides long signal paths into multiple shorter segments separated by impedance-matched via transitions and termination points. By segmenting the routing path and properly terminating each segment, the patent reduces cumulative signal attenuation while maintaining the overall connectivity flexibility needed for extended connections.
Data Source
Figure 1A
Figure 1B~1C
Figure 2
AI summary
Aspects of the disclosure provide an integrated circuit (IC) package. The IC package includes a package substrate configured to have a first surface and a second surface that is opposite to the first surface. An IC chip is interconnected with the package substrate. The IC package includes a first plurality of contact structures disposed on the first surface to electrically couple the IC package (e.g., a first plurality of input/output (I/O) pads on the IC chip) to traces on a printed circuit board (PCB). The IC package includes a second plurality of contact structures disposed on the second surface. The second plurality of contact structures is configured to electrically couple the IC package (e.g., a second plurality of I/O pads on the IC chip) to another device via a connective structure that is independent of the PCB.