IC Package Redistribution Layers for Thin Stable Fan-Out Routing
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller and more efficient packaging techniques for semiconductor dies as the demand for miniaturization increases, necessitating improved integration density and structural stability while maintaining thermal performance.
Innovation Solution
The formation of integrated circuit packages using multiple redistribution structures and composite interconnect layers, including polymer layers and prepreg materials, with varying thicknesses and conductive features, enhances yield and throughput through photolithographic techniques, providing improved structural stability and thermal performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional packaging techniques are used, then manufacturing simplicity is maintained, but integration density and miniaturization are limited
Solution Approach 1:
The packaging structure is divided into multiple composite layers (first composite layer, second composite layer) with distinct functions. Each layer contains specific conductive elements and interconnect structures, allowing complex functionality to be achieved through modular assembly rather than monolithic design, thereby improving integration density while managing complexity.
Solution Approach 2:
The patent transitions from planar packaging to three-dimensional stacked architecture with vertical interconnects. Conductive elements extend through multiple layers in the vertical dimension, enabling higher integration density by utilizing the third dimension for routing and connection, rather than being constrained to two-dimensional layouts.
2Volume of moving object
If package size is reduced for miniaturization, then device compactness is improved, but structural stability may be compromised
Solution Approach 1:
The patent employs composite interconnect layers combining organic materials (prepreg, polymer layers) with inorganic conductive elements (copper traces, vias). This composite structure provides both mechanical support and electrical connectivity, enabling reduced package thickness while maintaining structural integrity through the synergistic properties of combined materials.
Solution Approach 2:
Different regions of the package are assigned different material properties and thicknesses. The composite layers have varying compositions and thicknesses optimized for their specific locations - areas requiring mechanical support have thicker composite structures, while areas requiring electrical connectivity have optimized conductive element density, allowing overall miniaturization without compromising local structural stability.
3Productivity
If photolithographic techniques are used for routing, then manufacturing yield and throughput are improved, but process complexity increases
Solution Approach 1:
The photolithographic patterns are designed and prepared in advance with precise routing layouts defined before manufacturing. The conductive element patterns, via locations, and layer alignments are predetermined through CAD design and mask preparation, allowing high-speed photolithographic processing to directly transfer these pre-planned patterns onto the composite layers, thereby achieving high throughput without sacrificing routing precision.
4Ease of operation
If multiple composite layers with varying thicknesses are used, then fan-out routing efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent introduces intermediate composite layers with specific thicknesses and material compositions that act as mediators between different routing levels. These intermediate layers provide mechanical registration features and electrical reference planes that facilitate precise alignment between upper and lower conductive layers, enabling efficient fan-out routing through multiple thickness variations while maintaining manufacturable alignment tolerances.
Data Source
AI summary
A method includes forming first conductive elements on and extending through a first composite layer; forming a first polymer layer on the first composite layer; forming a first metallization pattern extending through the first polymer layer; forming a second polymer layer over the first polymer layer, wherein the second polymer layer is thinner than the first polymer layer; forming a second metallization pattern on and extending through the second polymer layer, wherein the second metallization pattern is thinner than the first metallization pattern; forming a second composite layer on the first composite layer; and forming second conductive elements extending through the second composite layer.


