IC Package Gap Filling Using Fluorinated Die Sidewalls
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Solution Overview
Problem
New packaging technologies for semiconductor devices face manufacturing challenges, particularly in filling gaps between semiconductor dies without forming large voids and requiring costly cleaning processes.
Innovation Solution
Doping the top surfaces and sidewalls of semiconductor dies with fluorine to create a hydrophobic profile, allowing a dielectric material to fill gaps from the bottom-up, reducing residue and the need for cleaning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional gap-filling processes are used to fill gaps between semiconductor dies, then the gaps can be filled with dielectric material, but large voids form and cleaning processes are required to remove residue
Solution Approach 1:
The patent applies local quality by creating a non-uniform doping concentration profile where the dopant concentration varies through the thickness of the semiconductor die. Specifically, the dopant concentration is higher near the bonding interface and decreases toward the top surface, creating different surface energy characteristics at different locations. This gradient doping profile enables the dielectric material to preferentially wet and adhere to the bonding interface region while avoiding void formation in the gap, thereby eliminating the need for cleaning processes.
Solution Approach 2:
The patent changes the physical-chemical parameters of the semiconductor die surface by introducing dopant elements that modify the surface energy and wettability. By controlling the dopant concentration distribution (creating a gradient from high at the bonding interface to low at the top surface), the patent alters the interfacial energy parameters to promote complete gap filling without voids and to prevent residue formation, thus improving manufacturing precision without generating harmful factors.
2Reliability
If dopant concentration is increased to improve gap filling, then adhesion improves, but cost and process complexity increase
Solution Approach 1:
The patent applies preliminary action by pre-establishing a specific dopant concentration profile in the semiconductor die before the gap-filling process. The dopant is introduced in advance during or after die attachment, creating a predetermined gradient distribution that optimizes adhesion at the bonding interface. This preliminary preparation ensures strong adhesion and void-free gap filling without requiring complex real-time control during the gap-filling process itself, thereby maintaining reliability while managing complexity.
Solution Approach 2:
The patent uses partial action by applying dopant primarily to specific regions where it is most needed - the bonding interface and near-surface regions - rather than uniformly throughout the entire die. The dopant concentration is deliberately kept high only where adhesion is critical and decreases toward the top surface. This targeted approach achieves the necessary adhesion strength and gap-filling quality without the excessive dopant用量 and process complexity that would result from uniform high-concentration doping throughout the entire die structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improved device reliability and performance by eliminating voids and residue, simplifying processing, and reducing manufacturing costs through controlled hydrophobic doping and bottom-up gap filling.
Implementation Method 1
performing a plasma treatment to dope top surfaces and sidewalls of each of the semiconductor dies with a suitable dopant (e.g., fluorine)
Implementation Method 2
an increased hydrophobicity of the top surfaces and upper sidewalls of the semiconductor dies compared to lower sidewalls of the semiconductor dies
Data Source
AI summary
A method includes bonding a first semiconductor die and a second semiconductor die to a substrate, where a gap is disposed between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, performing a plasma treatment to dope top surfaces and sidewalls of each of the first semiconductor die and the second semiconductor die with a first dopant, where a concentration of the first dopant in the first sidewall decreases in a vertical direction from a top surface of the first semiconductor die towards a bottom surface of the first semiconductor die, and a concentration of the first dopant in the second sidewall decreases in a vertical direction from a top surface of the second semiconductor die towards a bottom surface of the second semiconductor die, and filling the gap with a spin-on dielectric material.