IC Package Ground Plane Opening for Parasitic Capacitance Reduction
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Solution Overview
Problem
The slow advancement in packaging technology limits signal transmission speed in integrated circuit packages due to capacitive coupling between solder ball pads and the ground plane, causing parasitic capacitance that degrades signal performance.
Innovation Solution
An integrated circuit package with an opening in the ground plane above the solder ball, optionally including a spiral coil structure coupled between the integrated circuit and the solder ball, to reduce parasitic capacitance and enhance signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ground plane is present in the package substrate, then electromagnetic shielding and signal stability are improved, but parasitic capacitance increases causing signal bandwidth degradation
Solution Approach 1:
The patent extracts the harmful ground plane from the signal transmission path by creating openings (via holes) in the ground plane layer directly beneath the solder ball pads. This removal eliminates the parasitic capacitance formed between the solder ball pad and the ground plane, thereby improving signal bandwidth and high-frequency performance while maintaining ground plane functionality in other areas for electromagnetic shielding
Solution Approach 2:
The patent applies local quality by selectively removing the ground plane only in specific locations where solder balls are mounted, while preserving the ground plane in other areas. This localized modification reduces parasitic capacitance at critical signal transmission points without compromising the overall electromagnetic shielding and signal stability provided by the ground plane structure
2Ease of manufacture
If solder ball pads are used for connection, then ease of manufacture is improved, but capacitive coupling with ground plane causes signal transmission speed limitation
Solution Approach 1:
The patent extracts the harmful capacitive coupling effect by removing the ground plane in the immediate vicinity of the solder ball pads through opening formation. This eliminates the parasitic capacitance that limits signal transmission speed, allowing solder ball pads to maintain their manufacturing advantages while achieving high-speed signal transmission performance
3Reliability
If ground plane is continuous, then electromagnetic shielding is improved, but parasitic capacitance concentrates electrical charge causing poor insertion/return loss
Solution Approach 1:
The patent extracts the harmful parasitic capacitance by creating openings in the continuous ground plane at locations where solder balls are mounted. This breaks the continuous ground plane structure locally, eliminating the capacitive coupling and electrical charge concentration that cause poor insertion and return loss, while preserving the ground plane's electromagnetic shielding function in non-signal areas
Solution Approach 2:
The patent applies local quality by modifying the ground plane structure only in specific locations where solder balls are positioned. The ground plane remains continuous and provides electromagnetic shielding in areas where it is not removed, while the localized openings eliminate parasitic capacitance effects at signal transmission points, achieving both shielding and low parasitic capacitance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces parasitic capacitance, improving signal bandwidth and reducing insertion/return loss at high frequencies, thereby enhancing the overall electrical performance of the signal transmission.
Implementation Method 1
The fringing electric field may attract electrical charge on the ground plane to get concentrated in one location. The concentrated electrical charge in one location may produce parasitic capacitance that affects the signal being transmitted
Implementation Method 2
The integrated circuit package may further include a spiral coil structure that is formed within the opening. The spiral coil structure may be coupled in series between the integrated circuit and the solder ball
Data Source
AI summary
An integrated circuit package having a package substrate, an integrated circuit, and at least one solder ball is provided. The package substrate has first and second surfaces. The integrated circuit may be mounted on the first surface of the package substrate. The solder ball may be coupled to the second surface of the package substrate. The package substrate may include a substrate layer. The substrate layer may include a ground plane with an opening. The opening may be formed just above the solder ball. In one instance, the diameter of the opening is greater than the diameter of the solder ball pad.